hi, i have an if statement in my code
1 | if(a and (not b) and c = '1') then |
2 | output <= '1'; |
3 | else
|
4 | output <= '0'; |
5 | end if; |
a, b, and c are internal signal of type std_logic; output is signal out std_logic; when compile this code it is showing an error Error (10476): VHDL error at PowerSeq1.vhd(486): type of identifier "a" does not agree with its usage as "boolean" type