VHDL Code error

OP (Company: Mindteck) #5123811
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hi,
i have an if statement in my code
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if(a and (not b) and c = '1') then
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          output <= '1';
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      else
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           output <= '0';
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       end if;

a, b, and c are internal signal of type std_logic;
output is signal out std_logic;

when compile this code it is showing an error

Error (10476): VHDL error at PowerSeq1.vhd(486): type of identifier "a" 
does not agree with its usage as "boolean" type
Guest #5123829
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Hareesh M. wrote:


> if (a and (not b) and c = '1') then
                        -------
                              |_ type: boolean


the and operator needs operands of the same type, i.e all operands are 
boolean, or all of type std_logic.

The comparsion "c = '1'" results into type boolean; the sub-term "a and 
(not b)" into type std_logic (because a and b are of type std_logic)-> 
the rightmost "and" faces type missmatch.

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