Forum: FPGA, VHDL & Verilog Testbench for audio filter

von sha (Guest)

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I am new to hardware and I am working on vivado. I have created a 
circuit and I am trying to measure power in response to input size. For 
that I need to give different inputs using test bench. But even if I 
increase the testcases in the testbench the output .saif file generated 
remains the same. Please can anyone check whether the testbench is 
correct? Otherwise please let me know what I am doing wrong. I have 
attached the circuit design, testbench and .saif file.

Any help is appreciated.

Thanks in advance.

von Duke Scarring (Guest)

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For testbenching complex systems I use a two way approach:
- one testbench for every submodule
- one testbench for the whole system

In the submodule testbench it's easy to check corner cases etc.
The system testbench is for cheking the interfaces beetwing all modules.

To check the algorithms I use other high level programming languages 
like C, matlab or python.

What should your design do?
High pass? Low pass?
What is the sample rate?
Which interfaces are used to obtain the data?
Parallel ADC?
Serial ADC?
Which resolution?


von M. W. (elektrowagi78)

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as usual:

come, ask, never return for the answer


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