EmbDev.net

Forum: FPGA, VHDL & Verilog VHDL coding Register assignment


Author: Hareesh Mohanan (Company: Mindteck) (hareeshp)
Posted on:

Rate this post
0 useful
not useful
Hi,
How can i transfer 20 zeros to a register having 20 bit memory in vhdl.

   a <= "00000000000000000000";
is there any short code for the above assignment?

: Edited by User
Author: ui (Guest)
Posted on:

Rate this post
0 useful
not useful
a <= (others => '0');

Author: Hareesh Mohanan (Company: Mindteck) (hareeshp)
Posted on:

Rate this post
0 useful
not useful
ui wrote:
> a <= (others => '0');

thanks for your reply...and i have one more doubt.
how can we assign a register with decimal value, like we are assigning 
in verilog
 if(req_cop_trst_cnt >= 20'd131072) // verilog

Author: ui (Guest)
Posted on:

Rate this post
0 useful
not useful
You cannot like in verilog. You need to do it explicity. For this you 
need to cast your integer first to unsigned or signed and then to 
std_logic_vector.
see http://www.bitweenie.com/listings/vhdl-type-conversion/

Reply

Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]




Bild automatisch verkleinern, falls nötig