# Forum: FPGA, VHDL & Verilog LUT Questions

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I'm a student and i'm preaparing an exam and i have some question about
LUTs

1- How many memory case ( 1 bit) we have in a LUT with 12 inputs

2- How many of LUT-12 we must have for memorise a 64 bits variable

3- How many LUTs-12 we must have for memorise a 8000 variable of 64 bits

Thanks a lot

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Abdeljalil B. wrote:
> i have some question about LUTs
What is your definition of a LUT? How many outputs does your LUT have?

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Lothar M. wrote:
> Abdeljalil B. wrote:
>> i have some question about LUTs
> What is your definition of a LUT? How many outputs does your LUT have?

Hello , I understund that LUT is a particular case of a multipluxeur ..
so i think that the LUT has a 12 inputs and 1 output .

Thanks Miller

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LUT means Look Up Table.

If you have 12 bit input, how many rows do you think can you address
with these 12 bit?

If you say, that there is only one output, how much different bits can
you "store" with one LUT.

Ok, this is more or less a rephrase of your questions, but you should
really think about your exams yourself and not ask for the solution.

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MagIO2 wrote:
> LUT means Look Up Table.
>
> If you have 12 bit input, how many rows do you think can you address
> with these 12 bit?
>
> If you say, that there is only one output, how much different bits can
> you "store" with one LUT.
>
> Ok, this is more or less a rephrase of your questions, but you should

i have my exam on september, and i don't have documentation ... so i
take previous exams and exemples and i ask question for understund how
it works

Thanks

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Abdeljalil B. wrote:
> so i think that the LUT has a 12 inputs and 1 output .
That would need roughly 3,5 bit to address one of those 12 inputs. A
very poor chosen Multiplexer width...

Usually FPGA have 16:1 or 64:1 LUTs, also called 4-input and 6-input
LUT.

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I think he means a 12 input LUT. Which can be thought oft as a RAM with
1 Bit per adress. How many Adresses can you build with n inputs?

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-gb- wrote:
> I think he means a 12 input LUT.
Then its easy...

> 1- How many memory case ( 1 bit) we have in a LUT with 12 inputs
2^12

> 2- How many of LUT-12 we must have for memorise a 64 bits variable
64

> 3- How many LUTs-12 we must have for memorise a 8000 variable of 64 bits
2

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Edit:

> 2- How many of LUT-12 we must have for memorise a 64 bits variable
64

This i don't understand. I think of an 12-input lut as a RAM with 12bit
adress. So it can store 2^12 Bits.

OK with one fixed 12bit adress you always adress the same bit in this
"RAM". Is this how it is done? 64 LUTs where every LUT stores just one
bit at a fixed adress? Why not store all 64Bits in the 2^12 Bits RAM?
Because it can only output one Bit at a time?

Edit:
Now i understand. Had a look at SLICEL and SLICEM and both have a single
bit Output so indeed you have to use more LUTs in parallel.

: Edited by User

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You got it.

A 64 bit variable is 64 bits wide and to store 64 bits in parallel
you need 64 LUTs. Otherwise you must access each bit one after the
other.

In fact with 64 of those 12 input LUTs you could store 4096 of those 64
bit variables. But that was not the question... ;-)

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Lothar M. wrote:
> -gb- wrote:
>> I think he means a 12 input LUT.
> Then its easy...
>
>> 1- How many memory case ( 1 bit) we have in a LUT with 12 inputs
> 2^12
>
>> 2- How many of LUT-12 we must have for memorise a 64 bits variable
> 64
>
>> 3- How many LUTs-12 we must have for memorise a 8000 variable of 64 bits
> 2

For the 3 question why not 64*2 Lut=128, beacause with 64 of those 12
input LUTs you could store 4096 of those 64  bit variables

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Abdeljalil B. wrote:
> For the 3 question why not 64*2 Lut=128
You found the mistake and you are right... ;-)

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Lothar M. wrote:
> Abdeljalil B. wrote:
>> For the 3 question why not 64*2 Lut=128
> You found the mistake and you are right... ;-)

Thank you Lothar :)

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