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Forum: FPGA, VHDL & Verilog sdram problem in vhdl quartus


Author: Vehbi Baycan (vehbi)
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hello im trying to use sdram on de2i 150 board. im having trouble at 
using avalon sdram controller. im still new to fpga so please help me. i 
add my code as txt format.

Author: C.G. (Guest)
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Hi, sorry but without a more detailed problem description one can only 
guess so.. I don't know the de2 board, I got the DE0-nano board and on 
that the clock for the sdram chip had to be shifted about -54 degrees to 
make it work, maybe with the your board it is the same. The datasheet of 
the sdram controller ip, if I remeber correctly, also says something 
about a fmax of 100MHz for stable design, more speed might be possible 
but I never tried. The other tricky thing is the avalon fabric itself I 
was wrestling with the sdram controller ip for quite some time and found 
you can not only rely on the waitrequest signal to start your read or 
write action, you have to enable read or write and than you check the 
waitrequest signal it sounds strange but thats the way I got it working 
reliably... hope I could help.

Author: Vehbi Baycan (vehbi)
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thank you for your answer. as you say relying the waitrequest is a wrong 
thing to do. i managed to make it work but now i had a performance 
issues bu i think i can figure out how it works. thank you you gave me a 
nice piece of idea.

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