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Forum: FPGA, VHDL & Verilog Warning: NUMERIC_STD.">=": metavalue detected


Author: felix (Guest)
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helo members ,

i get this warning in questasim ,

Warning: NUMERIC_STD.">=": metavalue detected, returning FALSE,
here count is unsigned vector ..
for i in 0 to 2 generate
process(clk,rst)
 if(rst)then
   count<=<=(others=>(others=>'0'));
 elseif rising_edge(clk)then
  if((count(i)>=to_unsigned(0, count(i)'length))
..
 end if;
end if;
end process
end generate
how can this be solved. i assigned initial values dueing signal count 
initialisation and during reset still gettind same error

Author: Lothar Miller (lkmiller) (Moderator)
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felix wrote:
> count<=<=(others=>(others=>'0'));
Whats that?

The problem may be located somewhere outside the posted code snippet. 
Very interesting are the first 5 lines of your VHDL code. So simply 
attach your VHDL file as a *.vhdl file.

Author: Duke Scarring (Guest)
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felix wrote:
> how can this be solved
In such case I change the simulator runtime options (see graphic).
The simulator will stop an show the relevant code line.

Duke

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