Hi every one. I'm using altera MAX10M08SAU169C8G FPGA. My design code has already used 80% of logic cell available in the FPGA (total logic cells 8064). Is anybody know how to use RAM blocks, instead of logic cell registers? Otherwise how can put some logic elements in FPGA RAM block? Thanks.
Kenzo K. wrote: > Is anybody know how to use RAM blocks, instead of logic cell registers? 1. Usually in the synthesizers users guide you can find hints how to write HDL code to infer RAM blocks. 2. You also can infer RAM blocks manually. Then you get a less portable design, but you have more control over the implementation. Kenzo K. wrote: > My design code has already used 80% of logic cell available in the FPGA And why do you expect to turn down this value by using RAM blocks?
: Edited by Moderator
> And why do you expect to turn down this value by using RAM blocks? Because I would like to implement an algorithm in my FPGA that also consumed a lot of logic cells . So I am wondering if it is possible to put some logic cells in RAM blocks. In quartus tool it said to Use the MegaWizard Plug-In Manager (Tools menu) or appropriately coded Hardware Description Language to implement a function in a RAM block. But I am not sure if it is the good approach.
Is there any option in quartus II to do that.? Thanks.
Kenzo K. wrote: > Use the MegaWizard Plug-In Manager (Tools menu) or appropriately coded > Hardware Description Language to implement a function in a RAM block. > But I am not sure if it is the good approach. You have only those two. You must choose one of them. I would try the second first. Then it's more easy to simulate the design.
: Edited by Moderator
I had the same issue on a Max10 device recently, too. Even if running out of logic cells, Quartus refused to implement the inferred memory in block ram saying it was to small and will not infer RAM blocks. So you have force the tool to use block memory when inferring only small memories. I did the following: attribute ramstyle : string; attribute ramstyle of RamxD : signal is "M9K"; I know that "M9K" is not very portable, may be "M-RAM" should do, but I didn't test this so far. See: http://quartushelp.altera.com/15.0/mergedProjects/hdl/vhdl/vhdl_file_dir_ram.htm
: Edited by User
Generally, inferring block memories depends on the toolchain. A good reference is available at https://danstrother.com/2010/09/11/inferring-rams-in-fpgas/. There is no universal way, sadly.