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Forum: FPGA, VHDL & Verilog Problems Compiling in ModelSim


Author: Afkar O. (Company: nanyang polytechnic) (afkarsosman)
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Hi,

I'm having some problems compiling my codes, Im trying to do a 4 bit
adder and im confused as to why my codes cant compile and always giving
me error on my "4bitaddertb" codes:

"No feasible entries for infix operator "=".
"Type error resolving infix expression "=" as type 
std.STANDARD.BOOLEAN."

anyone have any idea on where am i going wrong?

thanks.

Author: Lothar M. (lkmiller) (Moderator)
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> and always giving me error on my "4bitaddertb" codes:
Related to which line of code?

Beside that minor problem you have a big problem in your code:
   if clk="1" then
       A_S <= "0000";
   elsif (clk='1' AND clk'event) then
       A_S <= A_S + "0001";
   end if;
Here A_S will be always "0000", except for 0ps (as long as a rising edge 
lasts) it will be "0001".

Author: Kest (Guest)
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Lothar M. wrote:
> Related to which line of code?

 if clk="1" then

here it is:

 if clk='1' then

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