EmbDev.net

Forum: FPGA, VHDL & Verilog Multiple Driver Nets _segmento{OBUF[0]


von ricardo (Guest)


Rate this post
0 useful
not useful
Help me .... I do not know where this error is.
1
LIBRARY ieee;
2
USE ieee.std_logic_1164.ALL;
3
use ieee.numeric_std.all;
4
use ieee.std_logic_unsigned.all;
5
use ieee.std_logic_arith.all;
6
7
entity colculadora_4bits is
8
Port(chaves_a, chaves_b: in std_logic_vector(3 downto 0);
9
         led: inout bit;
10
        led_1: inout bit;
11
        segmento: out bit_VECTOR(0 TO 6);
12
        chave_sinal: inout std_logic;
13
        clk: in std_logic;
14
        display: out bit_VECTOR(7 DOWNTO 0);
15
         x: inout integer;
16
        subtracao, soma: inout integer);
17
end colculadora_4bits;
18
19
architecture Behavioral of colculadora_4bits is
20
21
begin
22
23
process(chaves_a, chaves_b, chave_sinal)
24
begin
25
26
    if (chave_sinal = '0') then
27
        subtracao <= 0;
28
        soma <= conv_integer(chaves_a) + conv_integer(chaves_b);
29
    elsif(chave_sinal = '1') then
30
        soma <= 0;
31
        subtracao <= conv_integer(chaves_a) - conv_integer(chaves_b);
32
    END IF;
33
end process;
34
35
36
PROCESS(subtracao)
37
begin
38
        if (subtracao < 0) then
39
            led_1 <= '1';
40
            led <= '0';
41
        elsif(subtracao >= 0) then
42
            led <= '1';
43
            led_1 <= '0';
44
        end
45
    if;
46
end process;
47
48
49
PROCESS(x, soma, subtracao, chave_sinal, clk)
50
BEGIN
51
52
        if (subtracao <= 0) then
53
            x <= subtracao + (subtracao * (-2));
54
         else 
55
          x<= subtracao;
56
        end if;
57
        
58
        if (chave_sinal = '1') then
59
            if (x = 0) then
60
                if (clk 'event and clk='1') then
61
                
62
                    display <="11111110";  
63
                   segmento <= "0000001";  
64
                end if; 
65
             if (clk'event and clk = '0') then
66
                display <= "11111101";
67
               segmento <= "0000001";
68
            end if;
69
            
70
            elsif(x = 1) then
71
            if (clk 'event and clk = '1') then 
72
            
73
                display <="11111110";  
74
                segmento <= "1001111";
75
           end if;
76
        if (clk'event and clk = '0') then
77
                display <= "11111101";
78
                segmento <= "0000001";
79
        end if;
80
        
81
        elsif(x = 2) then
82
        if (clk 'event and clk='1') then 
83
            display <="11111110";  
84
            segmento <= "0010010";
85
            end if;
86
        if (clk'event and clk = '0') then
87
            display <= "11111101";
88
            segmento <= "0000001";
89
            end if;
90
            
91
        elsif(x = 3) then
92
        if (clk 'event and clk='1') then 
93
        display <="11111110"; 
94
        segmento <= "0000110"; 
95
        end if;
96
        if (clk'event and clk = '0') then
97
        display <= "11111101";
98
        segmento <= "0000001";
99
        end if;
100
        
101
        elsif(x = 4) then
102
        if (clk 'event and clk='1') then 
103
        display <="11111110"; 
104
        segmento <= "1001100";
105
        end if;
106
            if (clk'event and clk = '0') then
107
            display <= "11111101";
108
           segmento <= "0000001";
109
            end if;
110
            
111
            
112
        elsif(x = 5) then
113
        if (clk 'event and clk='1') then 
114
        display <="11111110";
115
        segmento <= "0100100";
116
        end if;
117
        if (clk'event and clk = '0') then
118
        display <= "11111101";
119
        segmento <= "0000001";
120
        end if;
121
        
122
        elsif(x = 6) then
123
       if (clk 'event and clk='1') then 
124
        display <="11111110";
125
        segmento <= "0100000";
126
        end if;
127
        if (clk'event and clk = '0') then
128
        display <= "11111101";
129
        segmento <= "0000001";
130
        end if;
131
        
132
        elsif(x = 7) then
133
        if (clk 'event and clk='1') then 
134
        display <="11111110";
135
        segmento <= "0001111";
136
        end if;
137
        if (clk'        event and clk = '0') then
138
        display <= "11111101";
139
        segmento <= "0000001";
140
        end if;
141
        
142
        elsif(x = 8) then
143
        if (clk 'event and clk='1') then 
144
        display <="11111110";
145
        segmento <= "1111111";
146
        end if;
147
        if (clk'        event and clk = '0') then
148
        display <= "11111101";
149
        segmento <= "0000001";
150
        end if;
151
        
152
        elsif(x = 9) then
153
        if (clk 'event and clk='1') then 
154
        display <="11111110";
155
        segmento <= "0000100";
156
        end if;
157
        if (clk'        event and clk = '0') then
158
        display <= "11111101";
159
        segmento <= "0000001";
160
        end if;
161
        
162
        elsif(x = 10) then
163
        if (clk 'event and clk='1') then 
164
        display <="11111110";
165
        segmento <= "0000001";
166
        end if;
167
        if (clk'event and clk = '0') then
168
        display <= "11111101";
169
        segmento <= "1001111";
170
        end if;
171
        
172
        elsif(x = 11) then
173
        if (clk 'event and clk='1') then 
174
        display <="11111110";
175
        segmento <= "1001111";
176
        end if;
177
        if (clk'event and clk = '0') then
178
        display <= "11111101";
179
        segmento <= "1001111";
180
        end if;
181
        
182
        elsif(x = 12) then
183
        if (clk 'event and clk='1') then  
184
        display <="11111110";  
185
        segmento <= "0010010";
186
        end if;
187
        if (clk'event and clk = '0') then
188
        display <= "11111101";
189
        segmento <= "1001111";
190
        end if;
191
        
192
        elsif(x = 13) then
193
        if (clk 'event and clk='1') then  
194
        display <="11111110"; 
195
        segmento <= "0000110";
196
        end if;
197
        if (clk'event and clk = '0') then
198
        display <= "11111101";
199
        segmento <= "1001111";
200
        end if;
201
        
202
        elsif(x = 14) then
203
        if (clk 'event and clk='1') then  
204
        display <="11111110"; 
205
        segmento <= "1001100";
206
        end if;
207
        if (clk'event and clk = '0') then
208
        display <= "11111101";
209
        segmento <= "1001111";
210
        end if;
211
        
212
        elsif(x = 15) then
213
        if (clk 'event and clk='1') then  
214
        display <="11111110";
215
        segmento <= "0100100";
216
        end if;
217
        if (clk'event and clk = '0') then
218
        display <= "11111101";
219
        segmento <= "1001111";
220
        end if;
221
  end if;
222
end if;
223
224
225
  if (chave_sinal = '0') then
226
    
227
    if (soma = 0) then
228
        if (clk'event and clk='1') then  
229
        display <="11111110";  
230
        segmento <= "0000001";   
231
        end if;
232
        if (clk'event and clk = '0') then
233
        display <= "11111101" after 5ns;
234
        segmento <= "0000001" after 5ns;
235
        end if;
236
        
237
        elsif(soma = 1) then
238
        if (clk'event and clk='1') then  
239
        display <="11111110";  
240
        segmento <= "1001111";
241
        end if;
242
        if (clk'event and clk = '0') then
243
        display <= "11111101";
244
        segmento <= "0000001";
245
        end if;
246
        
247
        elsif(soma = 2) then
248
       if (clk'event and clk='1') then
249
        display <="11111110";  
250
        segmento <= "0010010";
251
        end if;
252
        if (clk'event and clk = '0') then
253
        display <= "11111101";
254
        segmento <= "0000001";
255
        end if;
256
        
257
        elsif(soma = 3) then
258
        if (clk'event and clk='1') then
259
        display <="11111110"; 
260
        segmento <= "0000110"; 
261
        end if;
262
        if (clk'event and clk = '0') then
263
        display <= "11111101";
264
        segmento <= "0000001";
265
        end if;
266
        
267
        elsif(soma = 4) then
268
        if (clk'event and clk='1') then  
269
        display <="11111110"; 
270
        segmento <= "1001100";
271
        end if;
272
        if (clk'event and clk = '0') then
273
        display <= "11111101";
274
        segmento <= "0000001";
275
        end if;
276
        
277
        elsif(soma = 5) then
278
        if (clk'event and clk='1') then  
279
        display <="11111110";
280
        segmento <= "0100100";
281
        end if;
282
        if (clk'event and clk = '0') then
283
        display <= "11111101";
284
        segmento <= "0000001";
285
        end if;
286
        
287
        elsif(soma = 6) then
288
        if (clk'event and clk='1') then  
289
        display <="11111110";
290
        segmento <= "0100000";
291
        end if;
292
        if (clk'event and clk = '0') then
293
        display <= "11111101";
294
        segmento <= "0000001";
295
        end if;
296
        
297
        elsif(soma = 7) then
298
        if (clk'event and clk='1') then  
299
        display <="11111110";
300
        segmento <= "0001111";
301
        end if;
302
        if (clk'event and clk = '0') then
303
        display <= "11111101";
304
        segmento <= "0000001";
305
        end if;
306
        
307
        elsif(soma = 8) then
308
        if (clk'event and clk='1') then 
309
        display <="11111110";
310
        segmento <= "1111111";
311
        end if;
312
        if (clk'event and clk = '0') then
313
        display <= "11111101";
314
        segmento <= "0000001";
315
        end if;
316
        
317
        elsif(soma = 9) then
318
        if (clk'event and clk='1') then  
319
        display <="11111110";
320
        segmento <= "0000100";
321
        end if;
322
        if (clk'event and clk = '0') then
323
        display <= "11111101";
324
        segmento <= "0000001";
325
        end if;
326
        
327
        elsif(soma = 10) then
328
        if (clk'event and clk='1') then  
329
        display <="11111110";
330
        segmento <= "0000001";
331
        end if;
332
        if (clk'event and clk = '0') then
333
        display <= "11111101";
334
        segmento <= "1001111";
335
        end if;
336
        
337
        elsif(soma = 11) then
338
        if (clk'event and clk='1') then  
339
        display <="11111110";
340
        segmento <= "1001111";
341
        end if;
342
        if (clk'event and clk = '0') then
343
        display <= "11111101";
344
        segmento <= "1001111";
345
        end if;
346
        
347
        elsif(soma = 12) then
348
        if (clk'event and clk='1') then  
349
        display <="11111110";  
350
        segmento <= "0010010";
351
        end if;
352
        if (clk'event and clk = '0') then
353
        display <= "11111101";
354
        segmento <= "1001111";
355
        end if;
356
        
357
        elsif(soma = 13) then
358
        if (clk'event and clk='1') then  
359
        display <="11111110"; 
360
        segmento <= "0000110";
361
        end if;
362
        if (clk'event and clk = '0') then
363
        display <= "11111101";
364
        segmento <= "1001111";
365
         end if;
366
        
367
        elsif(soma = 14) then
368
        if (clk'event and clk='1') then  
369
        display <="11111110"; 
370
        segmento <= "1001100";
371
        end if;
372
        if (clk'event and clk = '0') then
373
        display <= "11111101";
374
        segmento <= "1001111";
375
        end if;
376
        
377
        elsif(soma = 15) then
378
        if (clk'event and clk='1') then  
379
        display <="11111110";
380
        segmento <= "0100100";
381
        end if;
382
        if (clk'event and clk = '0') then
383
        display <= "11111101";
384
        segmento <= "1001111";
385
        end if;
386
        
387
        elsif(soma = 16) then
388
        if (clk'event and clk='1') then  
389
        display <="11111110";
390
        segmento <= "0100000";
391
        end if;
392
        if (clk'event and clk = '0') then
393
        display <= "11111101";
394
        segmento <= "1001111";
395
        end if;
396
        
397
        elsif(soma = 17) then
398
        if (clk'event and clk='1') then 
399
        display <="11111110";
400
        segmento <= "0001111";
401
        end if;
402
        if (clk'event and clk = '0') then
403
        display <= "11111101";
404
        segmento <= "1001111";
405
        end if;
406
        
407
        elsif(soma = 18) then
408
        if (clk'event and clk='1') then  
409
        display <="11111110";
410
        segmento <= "1111111";
411
        end if;
412
        if (clk'event and clk = '0') then
413
        display <= "11111101";
414
        segmento <= "1001111";
415
        end if;
416
        
417
        elsif(soma = 19) then
418
        if (clk'event and clk='1') then  
419
        display <="11111110";
420
        segmento <= "0000100";
421
        end if;
422
        if (clk'event and clk = '0') then
423
        display <= "11111101";
424
        segmento <= "1001111";
425
        end if;
426
        
427
        elsif(soma = 20) then
428
        if (clk'event and clk='1') then  
429
        display <="11111110";  
430
        segmento <= "0000001";
431
        end if;
432
        if (clk'event and clk = '0') then
433
        display <= "11111101";
434
        segmento <= "0010010";
435
        end if;
436
        
437
        elsif(soma = 21) then
438
        if (clk'event and clk='1') then  
439
        display <="11111110";
440
        segmento <= "1001111";
441
        end if;
442
        if (clk'event and clk = '0') then
443
        display <= "11111101";
444
        segmento <= "0010010";
445
        end if;
446
        
447
        elsif(soma = 22) then
448
        if (clk'event and clk='1') then  
449
        display <="11111110";  
450
        segmento <= "0010010";
451
        end if;
452
        if (clk'event and clk = '0') then
453
        display <= "11111101";
454
        segmento <= "0010010";
455
        end if;
456
        
457
        elsif(soma = 23) then
458
        if (clk'event and clk='1') then  
459
        display <="11111110"; 
460
        segmento <= "0000110";
461
        end if;
462
        if (clk'event and clk = '0') then
463
        display <= "11111101";
464
        segmento <= "0010010";
465
        end if;
466
        
467
        elsif(soma = 24) then
468
        if (clk'event and clk='1') then  
469
        display <="11111110"; 
470
        segmento <= "1001100";
471
        end if;
472
        if (clk'event and clk = '0') then
473
        display <= "11111101";
474
        segmento <= "0010010";
475
        end if;
476
        
477
        elsif(soma = 25) then
478
        if (clk'event and clk='1') then  
479
        display <="11111110";
480
        segmento <= "0100100";
481
        end if;
482
        if (clk'event and clk = '0') then
483
        display <= "11111101";
484
        segmento <= "0010010";
485
        end if;
486
        
487
        elsif(soma = 26) then
488
        if (clk'event and clk='1') then  
489
         display <="11111110";
490
        segmento <= "0000110";
491
        end if;
492
        if (clk'event and clk='0') then
493
        display <="11111101"; 
494
        segmento <= "0010010";
495
        end if;
496
        
497
        elsif (soma = 27) then
498
        if (clk'event and clk = '1') then
499
        display <= "11111110";
500
        segmento <= "0001111";
501
        end if;        
502
        if (clk'event and clk='0') then
503
        display <="11111101"; 
504
        segmento <= "0010010";
505
        end if;
506
        
507
        elsif (soma = 28) then
508
        if (clk'event and clk = '1') then
509
        display <= "11111110";
510
        segmento <= "1111111";
511
        end if;
512
        if (clk'event and clk='0') then
513
        display <="11111101"; 
514
        segmento <= "0010010";
515
        end if;
516
        
517
        elsif (soma = 29) then
518
        if (clk'event and clk = '1') then
519
        display <= "11111110";
520
        segmento <= "0000100";
521
        end if;        
522
        if (clk'event and clk='0') then
523
        display <="11111101"; 
524
        segmento <= "0010010";
525
        end if;
526
        
527
        elsif (soma = 30) then
528
        if (clk'event and clk = '1') then
529
        display <= "11111110";
530
        segmento <= "0000001";
531
        end if;        
532
       if (clk'event and clk='0') then
533
        display <="11111101"; 
534
        segmento <= "0000110";
535
        end if; 
536
        
537
                                                                                  
538
end if;    
539
  end if;      
540
end process;
541
end Behavioral;

: Edited by Moderator
von Klakx (Guest)


Rate this post
0 useful
not useful
normally this error occurs if you drive "segmento" from more than one 
process. But I think you have a real bigger problem with your clock 
description.
1
PROCESS(x, soma, subtracao, chave_sinal, clk)
 shows one problem. There should be a single asynchronous reset like
1
PROCESS(a_reset_n,clk)
 or only synchronous reset and signals. Then your sensitivity list is 
very clear:
1
PROCESS(clk)

The 2nd pitfall in coding metholodgy is the multiple use of the 
rising_edge(clk) (or clk'event ..). Your process should only have one 
use of this like
[vhdl]
process(clk)
begin
   if rising_edge(clk) then
      if (chave_sinal = '1') then
            if (x = 0) then
                if (clk 'event and clk='1') then
                   display <="11111110";
                   segmento <= "0000001";
                end if;
            end if; -- <-- this was also missing?
            else
               display <= "11111101";
               segmento <= "0000001";
            end if;
         [..]
   end if;

of course you have take a 2nd look of your cycle timing after rework
end process;

von Lothar M. (lkmiller) (Moderator)


Rate this post
0 useful
not useful
ricardo wrote:
> I do not know where this error is.
The error itself is that you have multiple clocks in one megamonster 
process. Where did you learn this crude design mixed muddled practice? 
It must be your own idea, because I never saw anything roughly similar 
like that..

OK, having cleared that, one question: did you ever do a smaller design 
like a flashing LED or a chasing light?

> use ieee.numeric_std.all;
> use ieee.std_logic_unsigned.all;
> use ieee.std_logic_arith.all;
Never ever use the numeric_std together with the std_logic_arith libs. 
You will encounter some very weird error messages...

ricardo wrote:
> ... I do not know where this error is.
What do you try with that curious piece of code?
Is it some kind of counter on a 7 segment display?

von ricardo (Guest)


Rate this post
0 useful
not useful
I have to do sum and subtraction operations using 8 keys, for each 4bit 
binary number and the result appears on the decimal display. The LED 
indicates whether the result is negative or not

von ricardo (Guest)


Rate this post
0 useful
not useful
Sorry if my code is extensive but I'm new to vhdl and I do not have much 
idea how to do it

Thank you for your help

von Lothar M. (lkmiller) (Moderator)


Rate this post
0 useful
not useful
ricardo wrote:
> Port(chaves_a, chaves_b: in std_logic_vector(3 downto 0);
>          led: inout bit;
>         led_1: inout bit;
>         segmento: out bit_VECTOR(0 TO 6);
>         chave_sinal: inout std_logic;
>         clk: in std_logic;
>         display: out bit_VECTOR(7 DOWNTO 0);
>          x: inout integer;
>         subtracao, soma: inout integer);
So, for that exercise for sure you will not need that much ports (BTW: 
using inout ports just for laziness eg. "easy way to read an output 
port" is a reason for being fired...). Simply 2x4 inputs for the 
switches, 7 outputs for the seven segment display, one output for the 
sign led, and one input for the operation (add/subtract). Am I missing 
one?
I don't think so.
You will need no clock because the whole design is completely 
combinatorial.

All in all it could be implemented in a lookup table with 9 inputs and 8 
outputs. So the implementation in a 512x8 RAM would be the most 
efficient way to solve the problem...

: Edited by Moderator
von Lothar M. (lkmiller) (Moderator)


Attached files:

Rate this post
0 useful
not useful
The other way will be the more traditional one:
1
LIBRARY ieee;
2
USE ieee.std_logic_1164.ALL;
3
use ieee.numeric_std.all;
4
5
entity colculadora_4bits is
6
Port(chaves_a, chaves_b: in std_logic_vector(3 downto 0);
7
     signled           : out std_logic;
8
     segmento          : out std_logic_vector(6 downto 0); -- Bit 6..0: segment F..A
9
     operation         : in std_logic                      -- 0 = add, 1 = subtract
10
     );
11
end colculadora_4bits;
12
13
architecture Behavioral of colculadora_4bits is
14
signal sresult : signed (3 downto 0);
15
signal uresult : unsigned (3 downto 0);
16
begin
17
   -- calculate the result (range -8 to +7)
18
   sresult <= signed(chaves_a) + signed(chaves_b) when operation='0' else
19
              signed(chaves_a) + signed(chaves_b);
20
21
   -- display the sign             
22
   signled <= sresult(3);
23
24
   -- make the remaining number unsigned (range 0 to +8) --> less definitions for display
25
   uresult <= unsigned(sresult) when sresult>0 else
26
              unsigned(-sresult);
27
   
28
   -- display the unsigned number 
29
   with uresult select segmento <= 
30
      "0111111" when "0000",    -- 0
31
      "0000110" when "0001",    -- 1
32
      "1011011" when "0010",
33
      "1001111" when "0011",
34
      "1100110" when "0100",
35
      "1101101" when "0101",
36
      "1111101" when "0110",
37
      "0000111" when "0111",
38
      "1111111" when others;    -- 8
39
   
40
end Behavioral;

And voila: according to the waveform in the testbench its running very 
fine... ;-)

: Edited by Moderator
von Andreas S. (Company: Schweigstill IT) (schweigstill)


Rate this post
0 useful
not useful
Lothar M. wrote:
1
>    sresult <= signed(chaves_a) + signed(chaves_b) when operation='0' else
2
>               signed(chaves_a) + signed(chaves_b);

> And voila: according to the waveform in the testbench its running very
> fine... ;-)

Are you sure? ;-)

von Lothar M. (lkmiller) (Moderator)


Attached files:

Rate this post
0 useful
not useful
Andreas S. wrote:
> Are you sure? ;-)
Oooops, you are right.
With a '-' its working better. Let me say it was a little test...  ;-)

Reply

Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]




Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.