SO i am making a ping pong game in vhdl.The game is working fine but the i have to show the scores on seven segment display using pmod ssd. Since pmod ssd allows only one of the two seven segment display to be lite at a time i have to adjust the clock cycle such that we perceive both the display to be lite all the time. i am using two different states for each display and switching between them but it is not working very well because either just one is lite or the other one is two dim or the transistion between them is visible.The system clock has 100Mhz frequency please help me.This is a small part of supposedly bigger project and i do not ask you to help me write the code.please help,just point me in the right direction.
why not simply clock the c pin? in vhdl:
if rising_edge(clk) then
if reset=0 then
pin_c <= '0';
pin_c <= not pin_c;
you can change the clock to reduce the toggle rate or use can use enables and Counters if it is too fast.
My question is what should be the frequency of clock so it appears that both the segment are on.Correct me if I am wrong but if the switching between the segments is too fast we will perceive that both of them are off.
Abhishek S. wrote: > Correct me if I am wrong but if the switching between the segments is > too fast we will perceive that both of them are off. You are wrong. Try it. If you switch on every segment half the time then it will light up with half the "normal" brightness. And that's mostly regardless to the switching frequency. If it is too low (less than 100 Hz) then you will see flicker. If it's to fast (more than hundreds of KHz) then maybe the drivers are too slow and you will see ghosting. The whole thing is called "multiplexing". A hint: start with a frequency of about 200Hz.
: Edited by Moderator
Thanks Lothar Miller,I used clock frequency of about 375hz and it works like a charm.