Transistors in Verilog

Guest #4770378
Rate this post
• ▲ useful
▼ not useful
So your saying it is impossible to use pmos and nmos declarations when 
dealing with FPGAs? If so, then why do they even include those type 
declarations in verilog? Is there any other possible workaround, per 
say, creating the pmos from scratch?
Guest #4770471
Rate this post
• ▲ useful
▼ not useful
1) If you really want to synthesize: Read about your FPGA's primitives. 
They're called primitives because that's the most atomic thing you have 
access to on your FPGA.
2) If you want to simulate: You could certainly do that, but typically 
people use Spice or Qucs models for MOS transistor simulation
Moderator (Company: Titel) #4770475
Rate this post
• ▲ useful
▼ not useful
Benjamin L. wrote:
> So your saying it is impossible to use pmos and nmos declarations when
> dealing with FPGAs?
You got it.

> If so, then why do they even include those type declarations in verilog?
Who are "they"?
The (until now unknwon) FPGA manufacturer? Or who else?

> If so, then why do they even include those type declarations in verilog?
To keep thing short: out of the 100% that is possible to do with Verilog 
about 5% can be synthesized on a FPGA. With that transistor You try to 
do something out of those 95% impossible things...

The relevant document for Verilog on a FPGA is the synthesizers manual 
from the FPGA manufacturer. In that manual you find synthesizable 
templates and code snippets.

> Is there any other possible workaround, per say, creating the pmos from
> scratch?
As already said: NOT ON A FPGA. If you want "your" own transistor, then 
you must do "your" own ASIC. Alternatively you can pick one of the parts 
out of an ASIC manufacturers library...


BTW: did you read my 3 questions?
Guest #4771213
Rate this post
• ▲ useful
▼ not useful
I meant simulate and NOT synthesize. So knowing that, is it possible to 
simulate such transistors without getting that error?

@Lothar Miller
I meant the designers of verilog/quartus. Why would they include the 
functionality of having pmos(...) if you can't even use it
Moderator (Company: Titel) #4771474
Rate this post
• ▲ useful
▼ not useful
Benjamin L. wrote:
> I meant the designers of verilog/quartus.
those are completely different people with totally different aims.
You may find a Verilog description of a transistor, but for sure you 
will not find that transistor in any relationship to Quartus. That's 
because you can use Verilog (in however way) to design that transistor, 
but Quartus never ever will synthesize it on a Altera/Intel FPGA.

To keep things short:
Verilog is not Quartus. And Quartus is not Verilog. They overlap 
just for 5%.
Quartus not even is a simulator. It's ModelSim that's used for that job.

So at first you must get a clear picture about your toolchain. Otherwise 
it may be the same like taking a wrecking bar and try to hammer a screw 
into the wall: wrong tool and wrong strategy for that job..

Reply

Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.

Formatting
  • [c]C-Code[/c]
  • [vhdl]VHDL-Code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]
  • [[Title]] – link to an article
  • Link to another post: right-click its post ID (#8078628), copy the address, paste it into the text

More about formatting

Post long source code as an attachment, not in the text.

Already registered? Log in

Not shown to anyone. We send you a link; your post appears once you confirm it there.

By submitting you create a free account and accept the terms of use.