Hi Vija,

your problem description will enable nobody without crystal ball to help 
you in your situation...

you wrote that you´ve got a PCIe device with an UART...
That's a rather complicate setup for an FPGA novice and I´m afraid you 
are such one?

So here some question to help out with some informations for me and 
others:

Could you simulate your design?
for later detailed help, language: VHDL,Verilog mixed?
Are the pin constraints set? I`m assuming that you used the PCIe 
IP-Output as your starting point?
Could you be sure that you could do writes to your PCIe Node (Device 
Memory Mapping, Access rights ?) - How do you handle this - Do you use 
some code examples, using some helper APIs, wrote an driver plain by 
your own?
Could you control some simple IO's (LED?) from your PCIe Node?
Could you use an Oscilloskop or Logicanalyzer for further analysis?

What kind of Hardware/Softwaresetup you are using ?
ISE Version?
Do you use an S6-Evalboard (known to work well) or might there be 
physical/electrical problems?
What kind of translation you are using for connecting the FPGA towards 
your Linux machine?`
UART-USB Chip/Translator etc...

Regards

BigChip