How to connect two FPGAs and get the speed of 40 Gbit/s

e.g.
16 lanes of 2,5Gbit/s PCIe

which FPGA?
How much knowldege do you have?

Some FPGAs offer serdes blocks which are capable of up to 32Gbit/s per 
link.
But those are complicated and have many requirements regarding routing 
quality.

Dennis Restle wrote:
> which FPGA?

every FPGA with SERDES >= 2,5GBit/s

Dennis Restle wrote:
> How much knowldege do you have?

probably a litte more than you

Dennis Restle wrote:
> But those are complicated and have many requirements regarding routing
> quality.

You want high-speed as easy as SPI?

What´s yor problem?

@Schlumpf
I have no problem, i want to help komo. Either you have a problem to 
distinguish between me and Komo or you see to be very rude.

@Komo
Some more information would be helpfull. But to work with an design 
which processes 40 Gbit/s will bring some surprising difficulties for 
you.

best regards

Dennis Restle wrote:
> Either you have a problem to
> distinguish between me and Komo

Indeed I believed your reply was from Komo..
Next time I should take more care of the names.. :-) Sorry

Xilinx offers you FPGAs with high-speed serdes. For 40 gbps (pure net 
rate?) you will currently need multiple lanes. It is useful to pack a 
lightweight protocol core like Aurora on it.

There you can combine 5x 10,3Gbps links and have a nice streaming 
Interface on both sides.