Hello,

I need to combine this 3 coding to form one whole PWM system by using 
FPGA. But, I stuck and don't know how to combine it. Please help me.

Thank you.

You have to learn about structural description by using instantiations 
and port maps. See:

https://www.doulos.com/knowhow/vhdl_designers_guid...
http://www.tau.ac.il/~flaxer/edu/course/vhdl/slide...

I tried this, but I got an error when run this code..

typically the content of the error message will give you a hint, how you 
can avoid the error. So next time please post the error message, which 
gives you trouble.

Regarding your code: you have instantiated your component, but you did 
not declare it. Have a closer look at the examples FPGAKüchle linked. 
Especially the lines between "architecture" and "begin"

I already edited it, and it still have an error. This is the new code.

and this is the only error message you get? Then it looks like your 
development system found the component FreqDivider200Hz in work, but it 
did not find FreqDivider400Hz. If I were in your place I would check, 
why FreqDivider200Hz was addedd successfully but FreqDivider400Hz was 
not.

By the way: if you want plan to use the divided Clocks as real clock 
signal in a real hardware lateron, it will never run reliable. (for 
simulation only it should run fine). Don't misuse logic signals as a 
clock signal. If you want to slow down your PWM, use Clock-Enables 
instead of divided clocks.