i will be thankful if somebody will can help me.. my aim is to make a block that get 3 inputs: a clc that change every 0.1 sec a input that get '1' every time i press key0 and reset button that reset my count the aim is to count the number of time i press and when there is 3 secs that i dont press i get the count of the time i pressed i tried to it with this code"

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use ieee.std_logic_arith.all; entity CLAPNUM is port( resetN, clk : in std_logic; key0 : in std_logic ; sinus : out std_logic_vector(4 downto 0)); end CLAPNUM ; architecture arc_CLAPNUM of CLAPNUM is signal countera : std_logic_vector(4 downto 0) :="00000" ; signal counterb : std_logic_vector(4 downto 0) :="00000" ; signal cinout : std_logic := '0' ; signal moda : std_logic := '0' ; begin process ( resetN key0, clk) begin if resetN = '0' then countera<="00000" ; counterb<="11110"; elsif (key0 ='1') and moda='0' then countera<= countera+"00001" ; counterb<="11110"; elsif (rising_edge(clk)) then if counterb/="00000" and (key0 ='0') then counterb <= counterb-"00001"; else moda <= '1'; end if; elsif moda='1' then sinus<= countera; end if; end process; end arc_CLAPNUM; |

but clearly it dosent work... can someone help me plz?

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Edited by Moderator

First have a look at the attached sreenshot... > but clearly it dosent work... And HOW did you see that? Did you do a SIMULATION? What ERROR messages or WARNINGS did you get? And why do youignorethem all? In fact the problem here is the well known and famous "combinatorial loop": as long as key0 is 1 and moda is 0 the countera is counting upwards without any clock at maximum and random speed:

elsif (key0 ='1') and moda='0' then countera<= countera+"00001" ; |

Try Google translator on that: http://www.lothar-miller.de/s9y/archives/42-Kombinatorische-Schleifen.html Let me ask you: where did you see this structure in literature?

begin process ( resetN key0, clk) begin if resetN = '0' then ... elsif (key0 ='1') and moda='0' then ... elsif (rising_edge(clk)) then ... end if; |

There's only one way to desrcibe a synchronous process:

begin process ( resetN, clk) begin if resetN = '0' then ... elsif (rising_edge(clk)) then ... end if; |

Beside the whole things above: the sensitivity list is incomplete, moda ist missing. Therefore a simulation will show wrong results... BTW: congratulations to use the 1-process-FSM. You are a big step further than in the thread https://embdev.net/topic/386779

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Edited by Moderator