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Help with school project
von Nemlehet (Guest)

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Hello Everyone!

I'm a mechanical engineer in Hungary, and we were advised to take a 
programming course on the University. They said its gonna be easy, great 
experience etc... I liked this VHDL programming, we had simple task 
(like write out a number belonging for a set button, blinking led, 
things like that).
We got our exam project and I was stunned.... Its just so much more 
complicated, I dont even have idea where to start. So if somebody could 
help me whit this, that would be great.

The task is:
1. The board has to detect a signal seria.
2. There are 2 interface port: P and V (btn0, btn1)
3. One press of button means 1 signal, regardless of the pushing time.
4. The start of the signal seria starts with one of the buttons pressed
5. The end of the signal seria is 1 second after releasing a button.
6. The result should be shown on the right side LCD screen.
7. If the signal seria is PVVPP write P on the LCD.
8. If the input is any different than PVVPP or you press 2 buttons at 
once the LCD should blink an E character with 2 Hz frequency.
9. If I start a new signal seria, the LCD has to be cleared.

We are using ISE WebPack, and "developing" for Basys 2 demo panel 
(sptartan 3 FPGA).
I'm not really familiar with the english terms, so if I messed something 
with the translation let me know.

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Re: Help with school project
von Lothar M. (Company: Titel) (lkmiller) (Moderator)

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Nemlehet wrote:
> The task is:
Split it up in small steps:
2+3) you have 2 async buttons
--> sync them in and generate a key-pulse with edge-detection

5) is a simple retriggerable watchdog

6+7+8+9) you must be able to initialize and control a LCD: start 
with writing any letter on a defined position...
Have a look at the VHDL code there:
Beitrag "Re: EA DOG-M initialisieren"
Its for controlling a character LCD (HD44780like) using a 4-bit 
interface.

9) also relates to 4)

And after all there remains a simple FSM for detecting the button 
sequence.

I would start with the LCD...

Nemlehet wrote:
> if I messed something with the translation let me know.
seria => series

: Edited by Moderator
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