I'm using a Lattice MachXO2 and the Lattice Diamond design software.
In my design I want to feed data into a Pseudo Dual Port Ram from one
module (A simple UART) and read it out from another (an LED controller).
Lattice provides a RAM_DP module using IPExpress which is implemented
using the MachXO2's EBR Ram blocks.
I have no trouble generating and instantiating the RAM_DP module using
IPExpress and I have read through "Memory Usage Guide for MachXO2
Devices" on Lattice's website. It gives good info on how the instatiate
the module, and the timing diagrams.
This is how the module is declared, once generated from IP Express:
module pdpram (WrAddress, RdAddress, Data, WE, RdClock, RdClockEn,
Reset, WrClock, WrClockEn, Q);
What I'm looking for is some help in actually using the module. As far
as I can see the Read and Write clocks need to be out of phase, so I'm
not sure how to go about that. Do I even need to worry about that? (I'm
pretty new to FPGA, but getting there!).
So, does anyone have any examples of how to use the Pseudo Dual Port Ram