Lothar M. wrote:
> Junior H. wrote:
>> The idea is to create a Java circuit description of the application
>> using JHDL in order to generate the netlist
> What toolchain is able to handle this?
> In what manner is Java suitable to describe hardware?
JHDL is a software that given a Java hardware description as parameter
(basically are java files that contains methods to describe input,
output and behaviour of hardware components) it outputs a netlist.
more on: http://www.jhdl.org/documentation/starter.html
> After creating the EDIF netlist, you will need to run the FPGA vendor's
> tools which convert an EDIF netlist to a bitstream. In case of Xilinx,
> these might be the Alliance or Foundation tools. At any rate, the
> execution of these tools is outside the scope of this JHDL getting
> started guide and will be specific to your FPGA site setup.
> more on:
I have a Xilinx Artix 7. I Should use Vivado, isn't it? Anyway, guessing
from your posts it seems the right direction.
Thanks to you all.