Forum: FPGA, VHDL & Verilog verify the fcs of ethernet frame

von Sidharth K. (Company: cdac) (kashyap0)

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 i am trying to transmit a Ethernet frame from fpga to pc.
 my udp frame is:
constant udp_frameB :frame60:=
         (x"FF",x"FF",x"FF",x"FF", -- mac dest
    x"00",x"04",x"14",x"13", -- mac src
    x"08",x"00",x"45",x"00", -- IP header
    x"7A",x"C0",x"00",x"00", -- IP src
    x"00",x"00",x"FF",x"FF", -- IP dest
    x"FF",x"FF",x"00",x"00", -- port src
    x"50",x"DA",x"00",x"12",-- port dest + len
    x"00",x"00",x"42",x"42", -- checksum udp + data "B"
for the above frame i have calculated the FCS using the crc-32 
FCS is-X"D96F0BBF"
I have adopted following method to calculate FCS:
IEEE 802.3 defines the polynomial M(x) as the destination address, 
source address,length/type, and data of a frame, with the first 32-bits 
complemented. The result of CRC is complemented, and the result is the 
IEEE 802.3 32-bit CRC,referred to as the Frame Check Sequence (FCS) 
field. The FCS is appended to the end of the Ethernet frame, and is 
transmitted highest order bit first (x31, x30,…, x1, x0).
please tell me ,Is FCS correct or not?
and also tell me that if the FCS is not correct then will wireshark 
capture it or not?

von Daniel A. (daniel-a)

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Sidharth Kashyap wrote:
> Is FCS correct or not?

I don't know.

> and also tell me that if the FCS is not correct then will wireshark
> capture it or not?

In most cases, it won't. If a switch or router is betwen the fpega and 
the pc, it should discard the ethernet frame if the fcs is wrong. Most 
ethernet/wlan cards are verifying the checksum and the os will never see 
the checksum. If you haven't one of these cards, and there is nothing 
between the pc and the fpega, wireshark should be able to capture 
ethernetframes with wrong fcs. Otherwise, it won't.

von Schlumpf (Guest)

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Sidharth, why the heck do you start a new thread for every question on 
the same subject?


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