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Forum: FPGA, VHDL & Verilog to communicate fpga board to pc via ethernet


von Sidharth K. (Company: cdac) (kashyap0)


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hi
i am trying to cummunicate to pc with fpga board. i am using atlys board 
of digilent company in which spartan-6 (xc6slx45csg324c) is connected to 
marevell 88E1111 phy chip.In this project i am facing the problem to 
getting the mac address of board (phy chip) to send the arp frame and 
udp frame.because i am manually framming the udp and arp frame fr in my 
code for which i need source mac address i.e mac address of fpga board 
(or marvell phy chip).
please respond me as soon as possible.



constant udp_frameA :frame60:=
(x"FF",x"FF",x"FF",x"FF", -- mac dest
x"FF",x"FF",x"00",x"00",
x"00",x"04",x"14",x"13", -- i want to know this source mac address
x"08",x"00",x"45",x"00", -- IP header
x"00",x"2E",x"00",x"00",
x"00",x"00",x"40",x"11",
x"7A",x"C0",x"00",x"00", -- IP src
x"00",x"00",x"FF",x"FF", -- IP dest
x"FF",x"FF",x"00",x"00", -- port src
x"50",x"DA",x"00",x"12", -- port dest + len
x"00",x"00",x"41",x"41", -- checksum udp + data "A"
x"41",x"41",x"41",x"41",
x"41",x"41",x"41",x"41",
x"41",x"41",x"41",x"41",
x"41",x"41",x"41",x"41");

von Schlumpf (Guest)


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The mac address isn´t stored in the phy!
It is managed by the mac controller.
But in your case YOUR fpga design IS the mac controller and therefore 
YOU can use any mac address you like.
As long as you make sure that no other device in the network has the 
same mac address you are using, everything is fine.


To geht a "working" ethernet-frame, don´t forget the following:
- preamble and sfd
- padding to minimum 64 bytes (data + fcs)
- fcs at end of frame

von Sidharth K. (Company: cdac) (kashyap0)



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hi
i am trying to cummunicate to pc with fpga board. i am using atlys board 
of digilent company in which spartan-6 (xc6slx45csg324c) is connected to 
marevell 88E1111 phy chip.


my frame is:-

constant udp_frameA :frame60:=
    (x"FF",x"FF",x"FF",x"FF", -- mac dest
    x"FF",x"FF",x"00",x"00",
    x"00",x"04",x"14",x"13", -- mac src
    x"08",x"00",x"45",x"00", -- IP header
    x"00",x"2E",x"00",x"00",
    x"00",x"00",x"40",x"11",
    x"7A",x"C0",x"00",x"00", -- IP src
    x"00",x"00",x"FF",x"FF", -- IP dest
    x"FF",x"FF",x"00",x"00", -- port src
    x"50",x"DA",x"00",x"12", -- port dest + len
    x"00",x"00",x"41",x"41", -- checksum udp + data "A"
    x"41",x"41",x"41",x"41",
    x"41",x"41",x"41",x"41",
    x"41",x"41",x"41",x"41",
    x"41",x"41",x"41",x"41");
and i am getting same frame on simulation and chipScope but i am not 
getting this frame in proper order on Wireshark. Wireshark result 
attached with it.

please find this attachment.
please respond me as soon as possible.

von Sidharth K. (Company: cdac) (kashyap0)


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i read it. my question is different.

von Schlumpf (Guest)


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Did you read what I wrote?

Schlumpf wrote:
> To geht a "working" ethernet-frame, don´t forget the following:
> - preamble and sfd
> - padding to minimum 64 bytes (data + fcs)
> - fcs at end of frame

von Schlumpf (Guest)


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Sidharth Kashyap wrote in post #4124209:
> my question is different

I cannot see a question!

von jonasbiensack (Guest)


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I see x"DA" is readed as AD. You need to swap your bytes. LSB and MSB...

greetz maestro

von Lothar M. (Company: Titel) (lkmiller) (Moderator)


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@Sidharth Kashyap
Pls don't start a new thread with a similar title on the same topic!

von Sidharth K. (Company: cdac) (kashyap0)


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i am transmitting x"DA" as x"5B"
x"DA"=1101 1010
x"5B"=0101 1011


A lot of thanks for your previous suggestion.

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