|
Posted on:
|
This is my first post so hello to all! I'm just starting with fpga programming. I bought a cheap dev board from ebay: Ebay-Artikel Nr. 400630255386 As an initial test I wanted to see if I can get the leds light up. I don't have board description so based on the wiring the leds are probably connected to 3 of the first 10 pins somewhere. So I wrote code to set these pins to 1 but they don't work. I tried with 0 too maybe if the leds are active low. Output levels are set to LVTTL, as I see from the wiring all IO blocks get 3.3V. I supply it from 6V instead of 5 but that's not a problem as the stabilizer can handle it. JTAG threw me a "chain broken" message so I use AS mode. Tried restarting the board after programming. I use a chinese USB blaster with the newest 64bit win7 drivers and Quartus 6. Does anyone have some ideas where might the problem be? Thanks!
|
Posted on:
|
Hi bebel! what is your HDL that you wrote leds module. i know verilog, if you want to code verilog, i can help you if you want, my skype: tv_long
:
Edited by User
|
Posted on:
|
The code is as simple as can be, that's why I didn't think it would be
the cause:
entity fpga is
port(
F1: out std_logic;
F2: out std_logic;
F3: out std_logic;
F4: out std_logic;
F5: out std_logic
);
end fpga;
architecture behv2 of fpga is
begin
F1 <= '0';
F2 <= '0';
F3 <= '0';
F4 <= '0';
F5 <= '0';
end behv2;
|
Posted on:
|
I have one of these boards Here's the doc i have & 2 tests Bingo
|
Posted on:
|
Ohh do remember you have an onboard OSC connected. Quartus seems to default unused pins to : output driving GND You might get a race with the unused FPGA Osc pin (GND) and the OSC at 3.3v You could either make a dummy vhdl statement using the the OSC , or tell Quartus to set unused pins as 3-stated inputs with weak pullups /Bingo
:
Edited by User
|
Posted on:
|
Hey thanks Bingo, it works now! 1) The leds are active low so 0 had to be set. 2) Tri-stating unused pins helped, otherwise the leds are very dim. 3) I had to detach AS cable from the board to reboot from eprom. Earlier I only removed the power supply but it seems that's not necessary. Cheers!
|
Posted on:
|
bebel wrote: > 2) Tri-stating unused pins helped, otherwise the leds are very dim. > Cheers! That sounds like you had a problem with pins driving GND , and pulling your 3v3 down. Hope your Osc is ok. You could try the tests in the zip , they use the Osc. /Bingo
|
Posted on:
|
If you need additional learning material for VHDL and FPGA check out my course! https://www.udemy.com/vhdl-and-fpga-development-for-beginners-and-intermediates/?couponCode=FIVERR15
Watch this topic
Disable multi-page view