I have this code:

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`timescale 1ns / 1ps

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module blacks(input [31:0] b, 

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    input left,

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    output [3:0] nr_black);

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integer i = 0;

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integer nr;

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assign nr_black = 4'b0000;

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always @ (*) begin

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  if(left==0)

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  begin  

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    while (i < 31)

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    begin

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      if (b[i] == 0)

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        i=i+1;

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      else

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      begin

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        nr=0;

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        while (b[i] == 1)

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        begin

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          i=i+1;

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          nr=nr+1;

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        end

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        if (nr >= 2)

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          nr_black = nr_black + 4'b0001;

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      end

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    end

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  end

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  else;

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end

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endmodule

It gives me this error: "Procedural assignment to a non-register 
nr_black is not permitted, left-hand side should be 
reg/integer/time/genvar" on line 46

line 46 is this one: nr_black = nr_black + 4'b0001. How can i fix this 
program?

My nr_black is the output on 4 bits, and whenever nr is higher or equal 
than 2, i want to increment nr_black with 1. How do i do that? TY

Alexandru Chiser wrote:
> How can i fix this program?
You must add a clock to your design. At the moment you have a 
combinatorial loop (in theory a counter running at maximum speed, in 
reality a noise generator). And such a thing is nearly useless...

I can not add a clock in this. I must somehow count the output 
(nr_black) whenever i find out that nr is higher or equal than 2. I 
can`t add a clock. I need to do this without a CLK

Done! Now this error showed up:

"Target <nr_black> of concurrent assignment or output port connection 
should be a net type." on line 28

Line 28: assign nr_black = 4'b0000;

I tried to make nr_black wire, and then initialize a wire [3:0] counter.

And when nr>=2 counter = counter + 1. And at the end: assign nr_black = 
counter.

but it gives me this error: Procedural assignment to a non-register 
counter is not permitted, left-hand side should be 
reg/integer/time/genvar

I can`t figure it out...

Hi  Alexandru Chiser !

you only edit "output [3:0] nr_black" into "output reg  [3:0] nr_black"

your code when compiled it make circuit combination, but you used " 
alway" so output you is used, it used in "always" must be " reg" not 
"wire". My english is not good, that i written make you difficult 
understand, if you want to call me, skype: tv_long.

Yet, i can`t make it work. I made it reg / wire, added another wire to 
count and then assign the output = counter. Nothing works...