Forum: FPGA, VHDL & Verilog SATA controller program execution

von Sunayana C. (sunayana_c)

Attached files:

Rate this post
0 useful
not useful

I have the SATA HOST controller program from the university of 
massachusettes for ML405 board. However if I try to run the downloaded 
project on my Xilinx ISE 14.6, it gives many errors. I am just trying to 
simulate the project without connecting to the hardware. What might be 
the reason for so many errors and how should it be solved?
The snapshot of the error list is attached with this file.
I actually downloaded the project file created by one Mr: Gormann from 
this website.


I have not yet connected any hardware and just wanted to run this 
project on my Xilinx ISE 14.6. When I did so I got many errors. I want 
yo know if its required to connect the hardware before executing this 
project? Also do I need some user interface softwares like tera com, 
impact to be downloaded onto my PC as I want to implement SATA read / 
write. Is it possible that the entire project has not been uploaded by 
the designer on the website I have listed? Please suggest about how this 
problem should be solved.

I have been asked to adapt any previously written code for a SATA 
controller for the ML 605 board which we have and demonstrate the read / 
write capability and we donot have any purchased IP core. Please advice 
on how to go about doing this?

von Lothar M. (lkmiller) (Moderator)

Rate this post
0 useful
not useful
Sunayana C. wrote:
> I actually downloaded the project file created by one Mr: Gormann from
> this website.
Did you adapt the project file to your drive an paths? Or did you 
generate a new project file? Did you do a cleanup project files?

Just to be on the safe side: no spaces in path names...

von Duke Scarring (Guest)

Rate this post
0 useful
not useful
I see only warnings and no errors in your screenshot.
And I found almost no design without warnings...


von sunayana chakradhara (Guest)

Rate this post
0 useful
not useful
yes but i need to implement this design on a virtex 6 board and without 
using an IP core. How should this be done?


Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]

Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.