# Forum: FPGA, VHDL & Verilog How to write vectors in VHDL

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I would like to ask, how can I write vectors in VHDL.

Below I have written the VHDL code in Integers, But I am having
difficulties in writing it as Vectors?

The equation I am working with to find the correct answer from Waveform
is:

FX= A0 +A1x +A2^x2 +A3^x3
 ENTITY Polynomial1 IS PORT ( clk, res : IN BIT; ai, x : IN INTEGER:=0; fx : OUT INTEGER:=0); END Polynomial1; ARCHITECTURE bhv OF Polynomial1 IS SIGNAL reg : INTEGER:=0; BEGIN PROCESS BEGIN WAIT UNTIL (clk'EVENT AND clk = '1'); IF res = '1' THEN reg <= 0; ELSE reg <= x * (ai + reg); END IF; END PROCESS; fx <= reg + ai; END bhv; 


I have had a go at Vectors with assumable bits:


 ENTITY Polynomial1 IS PORT ( clk, reset : IN STD_LOGIC; a0, a1, a2, a3 : IN STD_LOGIC_VECTOR(2 DOWNTO 0); x : IN STD_LOGIC_VECTOR (1 DOWNTO 0); fx: OUT STD_LOGIC_VECTOR(8 DOWNTO 0)) ; END Polynomial1; 

I would like to apologies if i have made any format mistakes.

: Edited by Moderator

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John Smith wrote:
> Below I have written the VHDL code in Integers, But I am having
> difficulties in writing it as Vectors?
Check out the numeric_std package and its conversions and casts. Try
this (its German but you will get the point):
http://www.lothar-miller.de/s9y/archives/14-Numeric_Std.html

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