Hi , I have some experience designing FPGA IP's for projects( under 100Mhz). My Question is , is there any special design / knowledge that I need to know in-order to design what is considered high speed FPGA designs say 100 - 400Mhz range ? designs. I am talking about designs on an FPGA and not FPGA + board design. Please let me know if anyone has been involved in so-called high speed FPGA design projects Thanks in advance
Silver wrote: > My Question is , is there any special design / knowledge that I need to > know in-order to design what is considered high speed FPGA designs say > 100 - 400Mhz range No The synthesizer and PaR will do that for you by using the constraints you define. But: The higher the desired speed the shorter the time for logic and routing. So it´s up to you to avoid excessive logic between the registers.
As Schlumpf already said, you have to avoid excessive logic. You can split up logic in smaller parts and add registers in between (pipelining). This should increase the possible clock and throughput, as long as can keep all stages busy.