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Forum: FPGA, VHDL & Verilog DISPLAY A IMAGE ON MONITORTHROUGHT FPGA FPGA


Author: Revanasidha Jambgi (Company: bvb) (revanasidha)
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Dear All,

I want display image on monitor using FPGA
i have stored the image data (.COE)  into the BROM(ip core xillinx) & 
verified using verilog test bench
now i want read that data,process and display on the monitor .
i don't no the steps of  retrieving  the image data from BROM using 
verilog module
 kindly help in this regard.

Author: Lothar Miller (lkmiller) (Moderator)
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Revanasidha Jambgi wrote:
> i don't no the steps of  retrieving  the image data from BROM using
> verilog module kindly help in this regard.
Read the documentation of the BRAM/BROM. Theres a example how to access 
it with Verilog. And show/attach your code for furhter help.

Author: shahmustafa (Guest)
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Revanasidha J. wrote:
> Dear All,
>
> I want display image on monitor using FPGA
> i have stored the image data (.COE)  into the BROM(ip core xillinx) &
> verified using verilog test bench

how to verify stored image data suing test bench?

Author: Lothar Miller (lkmiller) (Moderator)
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shahmustafa wrote:
> how to verify stored image data suing test bench?
1. Please start an NEW thread for a NEW question
2. There is no need to verify the content of the stored image data, 
because it was YOUR testbench that stored it, and it would be YOUR 
testbench to verify it...

So, whats the actual problem?

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