Mohammad wrote:
> i want to model a C-HB for real time simulation
I guess that less than 1% in here might guess what you mean by that, 
since several definitions came to my mind already.

Assuming you are meaning a coil's HB-curve, you found somebody who did 
that, and if you are meaning the concentration of hemoglobin, too.

> and implement this into FPGA boards.
done

> i read some paper about MNA , but i xplorer method for modeling circuit
I am not sure if MNA was the right approach in this case, I did that the 
discrete way in FPGAs for my, but here it depends on your detailed task. 
In another case, analytical node analysis was the right, but this was 
done in software.

Although FPGAs are fine to process Matrix operations required for MNA, 
I'd consider to do this in C language to be able to modify algorithms 
and handle the depth of iterations  more easily. Moreover recursive 
processing is a commonly required method when doing simulation and this 
refers even more to MNA. You will need strong knowledge and concepts 
regarding pipelined virtual processing to be able to realize interative 
(and even recursive processes) in an FPGA effectively.

Jürgen Schuhmacher wrote:
> Mohammad wrote:
>> i want to model a C-HB for real time simulation
> I guess that less than 1% in here might guess what you mean by that,
> since several definitions came to my mind already.
>
> Assuming you are meaning a coil's HB-curve, you found somebody who did
> that, and if you are meaning the concentration of hemoglobin, too.
>
>> and implement this into FPGA boards.
> done
>
>> i read some paper about MNA , but i xplorer method for modeling circuit
> I am not sure if MNA was the right approach in this case, I did that the
> discrete way in FPGAs for my, but here it depends on your detailed task.
> In another case, analytical node analysis was the right, but this was
> done in software.
>
> Although FPGAs are fine to process Matrix operations required for MNA,
> I'd consider to do this in C language to be able to modify algorithms
> and handle the depth of iterations  more easily. Moreover recursive
> processing is a commonly required method when doing simulation and this
> refers even more to MNA. You will need strong knowledge and concepts
> regarding pipelined virtual processing to be able to realize interative
> (and even recursive processes) in an FPGA effectively.

thanks for your answer
my main problem is that finding a reference ?
reference for MNA or ADC etc

Mohammad Mothermohammad wrote:
> reference for MNA or ADC etc
Don't use TLAs! Write complete and meaningful sentences instead. 
Otherwise no one even understands the question. And given that, how can 
you expect a useful answer?

Mohammad Mothermohammad wrote:
> my main problem is that finding a reference

No your main problem is, that you still did not describe, WHAT you 
want to model. This is the first thing to clarify and HOW to model it, 
was the second question. Please refer to my first sentence in the 
posting above. Once we know what you mean by C-HB there will be people 
out to help you. Refer also to what Lothar advised to you (LFL) 
regarding WTCs. People won't google for UTAs just to find out, what you 
intend to do. In germany for instance MNA is not a commonly used term 
for ECSs, but they use the german EKA.

Anyway, possibly MNA was an approach if there are current branches to 
investigate which was the case for the assumed magnetic problem. To find 
the corresponding BCE's we again need to know the focus and also the 
parameters.

In my FMT finally only voltage response was required depending on the 
frequency input, so the equations simplified to second order 
differential equations which could be ported into a C-language model as 
well as an ABM block for pSPICE, to make use of a given simulator. Case 
verification (which will probably your next question after having a 
solution) was performed by MCA using existent SPICE models for these 
cases which were particularly adapted to the frequency. You can get an 
impression here:

http://home.arcor.de/juergen.schuhmacher/japarameters.html

The other case, I described above, where RTA was performed by an FPGA, 
made use of modified (discrete) equations based on common KCLs.


LOA
------------------

ABM = Analog Behavioral Model
BCE = Branch Constitutive Equation
ECS = electrial circuit simulation
ENA = Enhanced Node Analysis
FMT = formerly mentioned task
KCL = Kirchhoffs Circuit Laws
LFL = Lothar's Forum Laws
LOA = List of Abbrevations
MCA = model coverage analysis
MNA = Modified Node Analysis
RTA = real time analysis
TLA = three letter abbreviation
UTA = unknown technical abbrevation
WTC = word to clarify


-------------------
EKA = Erweiterte Knotenanalyse