when i tried to make division it gave me that error in implementation how i can overcome that??

signal sum: integer range 0 to 255; norm_dis <= 1000*sum/32768; |

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Xilinx does not support real math for synthesis. A short search with your prefered internet search engine should have shown that.

and it gave me the same error,but when i divide by 3 i hope some one help us

yes y r right ,but how i can solve it?

You may implement - or rather describe - a divider on your own. Possibly there is an description on the internet. Just give your search engine a try. A good starting point is also the Hamburg VHDL Archive.

I forgot: There is a IP-Generator for dividers in Xilinx, too. You may use this either.

what is the datatype of norm_dis? If it would be integer, the solution would be quite simple: Just calculate 1000*sum and ignore the lower 15 bits. If it would be floating-point (i.e. real), then you have to accept that actual hardware/development-software of FPGAs is not powerfull enough, to implement this calculation right away. A good solution then might be to use fixpoint-calculation instead of floating point calculation. I.e. just replace the expression 1000*sum/32768 by 1000*sum and "keep in mind", that you have shifted the position of the "decimal-point" 15 positions to the left. (well: it's not a decimal point shift of 15 decimal positions, we just shift 15 dual positions as 2^15=32768)

thanks a lot ,but i use 1000 because if i divide without the result would be float so i get ride of it by multiply by 1000

yes norm_dis is integer

meno wrote: > thanks a lot ,but i use 1000 because if i divide without the result > would be float so i get ride of it by multiply by 1000 Well, that's not exaclty true. Theintegerdivision of 255/32768 does not result in a floating point value. It results in the integer constant 0. The integer calculation of 1000*sum/32768 results in an integer in the range 0..7 (cause 1000*255/32768 is 7 plus some remainder). So if the integer result is what you are interested in: just take the multiplication of 1000*sum (which is synthesizable, either by logic elements of with a multiplier IP-core) and ignore the lowest 15 bits of the result. Ignoring 15 lsbs is equivalent to an integer division by 32768. Maybe you could simplify your calculation further: the multiplication with 1000 is very close to the multiplication with 1024. And the calculation 1024*sum/32768 is nothing else but ignoring the lowest 5 bits of sum.