VHDL: Comaprision of different multipliers using filter
Guest
#3634003
Can somebody explain the algorithm for analysing/testing different booth multipliers like add&shift, array multiplier, booth radix-2,4,8 multipliers.. Their speed,power and area consumption and overall performance ?? I am done with the coding of all those multipliers but have a problem with testing them.
Guest
#3635824
ssss wrote: > have a problem with testing them. Take a couple of CMOS chips, build your multipliers and you can measure speed, number of gates and powerconsumtion with scope, calculator and multimeter. ReplyPlease log in before posting. |