Vmax not reached

library ieee;

use ieee.std_logic_1164 .all;

use ieee.std_logic_arith.all;

use ieee.std_logic_unsigned.all;

use ieee.math_real.all;

entity test is

  generic(AMP: real;

    OFFSET: real;

    FREQ: real);

  port(triangle: out real);

end test;

architecture archi of test is

signal tmp : real := 0.0;

begin

  P1:process

  constant delta   : real := 1000.0e-12;

  constant fin   : time := 1000 ps;

  variable t   : real := 0.0;

  variable Vmax    : real := AMP/2.0;

  begin

    loop

      t := t + delta;

      tmp <= OFFSET+Vmax*(2.0/math_pi)*arcsin(sin(math_2_pi*FREQ*t));

      wait for fin;

    end loop;

    wait;

  end process P1;

  triangle <= tmp;

end archi;