vhdl code to find max value from input

Moderator (Company: Titel) #3526956
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basma wrote:
> i search but didn't find any thing helpe me.
What did you search for?

> any idea plz....
This is exaclty what you need (according to your requirements):
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.math_real.ALL;
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entity findmax is
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  port (
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    clk : in std_logic;
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    clr : in std_logic;
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    din : in real;
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    max : out real;
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  );
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end findmax ;
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architecture Behavioral of findmax is
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signal m : real := 0.0;
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begin
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  process begin
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    wait until rising_edge(clk);
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      if clr='1' then
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        m <= 0.0;
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      elsif din>m then
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        m <= din;
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      end if;    
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    end if;
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  end process;
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  max <= m;
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end Behavioral;
Of course I already added a clock and a clear signal. Otherwise (without 
clock and clear) it would look much less complicated:
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.math_real.ALL;
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entity findmax is
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  port (
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    din : in real;
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    max : out real;
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  );
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end findmax ;
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architecture Behavioral of findmax is
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signal m : real := 0.0;
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begin
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  m <= din when m<din else m;
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  max <= m;
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end Behavioral;
Moderator (Company: Titel) #3532513
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Basma Hassan wrote:
> if i want to find the max value in
> (0.3251,0.2536,0.2147,0.3669.............)
Do you remember my unanswered questions?
Lothar Miller wrote:
> And where do the numbers come from?
> Where are the numbers generated and/or stored?

Basma Hassan wrote:
> how to test it and find the max value
Show the definition of your data at least. Is it an array of floating 
point numbers? How is this array defined?

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