I want to implement IEC 61850 communication standard(for relays based on FPGA) in my project work.Can anybody suggest me how it is implemented on FPGA?
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#3325100
how can i get our solar system in a pin-pon ball... a full supported 61850 stack in vhdl, thats mission inpossible.
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#3325143
I think it is possible, but it is not sensible it requires either a soft core are a complex state machine if you do not know how to prgram in C or produce FSMs, then this is not the right work for you
Worker@Siemens wrote: > I think it is possible, but it is not sensible > it requires either a soft core are a complex state machine > if you do not know how to prgram in C or produce FSMs, then this is not > the right work for you Dear Sir I had studied IEC 61850 standard and some relevant paper for relay communication purpose. As I came to know that we have to follow ISO/IEC 8802 -3 frame format for GOOSE. The last frame for this is APDU and this APDU is according to ASN.1 /BER encoding rules and having 13 labels as gocbRef, timeAlloedtoLive, datSet,goID,t,stNum,sqNum,test,confRev,ndsCom,numDatSetEntres,allData,se curity( IEC 61850). Sir I got confused what is numerical value of gocbRef as in papers and IEC61850 standard it is given in LLN0$gocb , what is numerical value of datSet i.e. data set and allData. What are different numerical values for these for different relays as overcurrent,distance etc. Sir can I check this complete frame with Wireshark software. Sir I am working on FPGA based relays in my research project and we are doing serial communication. Can we send this complete frame(after setting numerical values as I don't know ) in serial and convert it to ethernet and check the same on Wireshark. Sir kindly suggest me the numerical values for above mentioned and can I check the frame using above mentioned method.
@varun maheshwari Its not necessary to post the very same text three times!
Hi Varun varun maheshwari wrote: > I want to implement IEC 61850 communication standard(for relays based on > FPGA) in my project work.Can anybody suggest me how it is implemented on > FPGA? can you provide a link to the paper you study regarding IEC 61850 implementation? Thanks!