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#3279427
hi I have the same problem and I do not know what I should do. This is my vhdl code : ------------------------------------------------------------------------ ---------- -- Company: -- Engineer: -- -- Create Date: 23:41:24 08/10/2013 -- Design Name: -- Module Name: scrambler - Behavioral -- Project Name: -- Target Devices: -- Tool versions: -- Description: -- -- Dependencies: -- -- Revision: -- Revision 0.01 - File Created -- Additional Comments: -- ------------------------------------------------------------------------ ---------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.NUMERIC_STD.ALL; use STD.TEXTIO.ALL; library WORK; use WORK.pkgg.ALL; --Library XilinxCoreLib; -- Uncomment the following library declaration if using -- arithmetic functions with Signed or Unsigned values --use IEEE.NUMERIC_STD.ALL; -- Uncomment the following library declaration if instantiating -- any Xilinx primitives in this code. --library UNISIM; --use UNISIM.VComponents.all; entity scrambler is Port ( e : in STD_LOGIC_VECTOR (29 downto 0); Sel : in STD_LOGIC_VECTOR (3 downto 0); s : out STD_LOGIC_VECTOR (29 downto 0)); end scrambler; architecture Behavioral of scrambler is SIGNAL rst_n80220 : std_logic; SIGNAL clk80220 : std_logic; SIGNAL dout80220 : std_logic_vector(18 downto 0); SIGNAL rst_n80216b : std_logic; SIGNAL clk80216b : std_logic; SIGNAL dout80216b : std_logic_vector(5 downto 0); SIGNAL rst_n802154g : std_logic; SIGNAL clk802154g : std_logic; SIGNAL dout802154g : std_logic_vector(7 downto 0); SIGNAL rst_nCDMA2000 : std_logic; SIGNAL clkCDMA2000 : std_logic; SIGNAL doutCDMA2000 : std_logic_vector(29 downto 0); SIGNAL rst_nGPRS : std_logic; SIGNAL clkGPRS : std_logic; SIGNAL doutGPRS : std_logic_vector(5 downto 0); SIGNAL rst_nGSM : std_logic; SIGNAL clkGSM : std_logic; SIGNAL doutGSM : std_logic_vector(23 downto 0); SIGNAL rst_nHSDPA : std_logic; SIGNAL clkHSDPA : std_logic; SIGNAL doutHSDPA : std_logic_vector(14 downto 0); SIGNAL rst_nIS95 : std_logic; SIGNAL clkIS95 : std_logic; SIGNAL doutIS95 : std_logic_vector(13 downto 0); SIGNAL rst_nLTE : std_logic; SIGNAL clkLTE : std_logic; SIGNAL doutLTE : std_logic_vector(14 downto 0); SIGNAL rst_nUMTS : std_logic; SIGNAL clkUMTS : std_logic; SIGNAL doutUMTS : std_logic_vector(15 downto 0); SIGNAL rst_nWCDMA : std_logic; SIGNAL clkWCDMA : std_logic; SIGNAL doutWCDMA : std_logic_vector(23 downto 0); SIGNAL rst_nDVB : std_logic; SIGNAL clkDVB : std_logic; SIGNAL doutDVB : std_logic_vector(13 downto 0); width80220 : integer := 19; length80220 : integer := 20; taps80220 : T_LFSR_TAPS4 := (20, 19, 16, 14); width80216b : integer := 6; length80216b : integer := 7; taps80216b : T_LFSR_TAPS6 := (7, 6, 5, 4, 3, 2); width802154g : integer := 8; length802154g : integer := 9; taps802154g : T_LFSR_TAPS2 := (9, 4); widthCDMA2000 : integer := 30; lengthCDMA2000 : integer := 31; tapsCDMA2000 : T_LFSR_TAPS16 := (31, 27, 26, 25, 22, 21, 19, 18, 17, 16, 10, 7, 6, 5, 3, 2); widthGPRS : integer := 6; lengthGPRS : integer := 7; tapsGPRS : T_LFSR_TAPS2 := (7, 4); widthGSM : integer := 24; lengthGSM : integer := 25; tapsGSM : T_LFSR_TAPS4 := (25, 20, 12, 8); widthHSDPA : integer := 15; lengthHSDPA : integer := 16; tapsHSDPA : T_LFSR_TAPS4 := (16, 14, 13, 11); widthIS95 : integer := 14; lengthIS95 : integer := 15; tapsIS95 : T_LFSR_TAPS6 := (15, 13, 9, 8, 7, 5); widthLTE : integer := 15; lengthLTE : integer := 16; tapsLTE : T_LFSR_TAPS3 := (16, 12, 5); widthUMTS : integer := 16; lengthUMTS : integer := 17; tapsUMTS : T_LFSR_TAPS2 := (17, 7); widthWCDMA : integer := 24; lengthWCDMA : integer := 25; tapsWCDMA : T_LFSR_TAPS2 := (25, 3); widthDVB : integer := 14; lengthDVB : integer := 15; tapsDVB : T_LFSR_TAPS2 := (15, 14); component genlfsr80220 generic ( width80220 : integer := 19; length80220 : integer := 20; taps80220 : T_LFSR_TAPS4 := (20, 19, 16, 14) ); port ( rst_n80220 : in std_logic; clk80220 : in std_logic; dout80220 : out std_logic_vector(18 downto 0) ); end component; component genlfsr80216b generic ( width80216b : integer := 6; length80216b : integer := 7; taps80216b : T_LFSR_TAPS6 := (7, 6, 5, 4, 3, 2) ); port ( rst_n80216b : in std_logic; clk80216b : in std_logic; dout80216b : out std_logic_vector(5 downto 0) ); end component; component genlfsr802154g generic ( width802154g : integer := 8; length802154g : integer := 9; taps802154g : T_LFSR_TAPS2 := (9, 4) ); port ( rst_n802154g : in std_logic; clk802154g : in std_logic; dout802154g : out std_logic_vector(7 downto 0) ); end component; component genlfsrCDMA2000 generic ( widthCDMA2000 : integer := 30; lengthCDMA2000 : integer := 31; tapsCDMA2000 : T_LFSR_TAPS16 := (31, 27, 26, 25, 22, 21, 19, 18, 17, 16, 10, 7, 6, 5, 3, 2) ); port ( rst_nCDMA2000 : in std_logic; clkCDMA2000 : in std_logic; doutCDMA2000 : out std_logic_vector(29 downto 0) ); end component; component genlfsrGPRS generic ( widthGPRS : integer := 6; lengthGPRS : integer := 7; tapsGPRS : T_LFSR_TAPS2 := (7, 4) ); port ( rst_nGPRS : in std_logic; clkGPRS : in std_logic; doutGPRS : out std_logic_vector(5 downto 0) ); end component; component genlfsrGSM generic ( widthGSM : integer := 24; lengthGSM : integer := 25; tapsGSM : T_LFSR_TAPS4 := (25, 20, 12, 8) ); port ( rst_nGSM : in std_logic; clkGSM : in std_logic; doutGSM : out std_logic_vector(23 downto 0) ); end component; component genlfsrHSDPA generic ( widthHSDPA : integer := 15; lengthHSDPA : integer := 16; tapsHSDPA : T_LFSR_TAPS4 := (16, 14, 13, 11) ); port ( rst_nHSDPA : in std_logic; clkHSDPA : in std_logic; doutHSDPA : out std_logic_vector(14 downto 0) ); end component; component genlfsrIS95 generic ( widthIS95 : integer := 14; lengthIS95 : integer := 15; tapsIS95 : T_LFSR_TAPS6 := (15, 13, 9, 8, 7, 5) ); port ( rst_nIS95 : in std_logic; clkIS95 : in std_logic; doutIS95 : out std_logic_vector(13 downto 0) ); end component; component genlfsrLTE generic ( widthLTE : integer := 15; lengthLTE : integer := 16; tapsLTE : T_LFSR_TAPS3 := (16, 12, 5) ); port ( rst_nLTE : in std_logic; clkLTE : in std_logic; doutLTE : out std_logic_vector(14 downto 0) ); end component; component genlfsrUMTS generic ( widthUMTS : integer := 16; lengthUMTS : integer := 17; tapsUMTS : T_LFSR_TAPS2 := (17, 7) ); port ( rst_nUMTS : in std_logic; clkUMTS : in std_logic; doutUMTS : out std_logic_vector(15 downto 0) ); end component; component genlfsrWCDMA generic ( widthWCDMA : integer := 24; lengthWCDMA : integer := 25; tapsWCDMA : T_LFSR_TAPS2 := (25, 3) ); port ( rst_nWCDMA : in std_logic; clkWCDMA : in std_logic; doutWCDMA : out std_logic_vector(23 downto 0) ); end component; component genlfsrDVB generic ( widthDVB : integer := 14; lengthDVB : integer := 15; tapsDVB : T_LFSR_TAPS2 := (15, 14) ); port ( rst_nDVB : in std_logic; clkDVB : in std_logic; doutDVB : out std_logic_vector(13 downto 0) ); end component; begin U1: entity work.genlfsrWCDMA(behavioral) generic map(widthWCDMA => widthWCDMA ,lengthWCDMA => lengthWCDMA ,tapsWCDMA => tapsWCDMA) port map (rst_nWCDMA => rst_nWCDMA ,clkWCDMA => clkWCDMA ,doutWCDMA => doutWCDMA); U2: entity work.genlfsrUMTS(behavioral) generic map (widthUMTS => widthUMTS ,lengthUMTS => lengthUMTS ,tapsUMTS => tapsUMTS) port map (rst_nUMTS => rst_nUMTS ,clkUMTS => clkUMTS ,doutUMTS =>doutUMTS); U3: entity work.genlfsrGSM(behavioral) generic map (widthGSM => widthGSM ,lengthGSM => lengthGSM ,tapsGSM => tapsGSM) port map (rst_nGSM => rst_nGSM ,clkGSM => clkGSM ,doutGSM =>doutGSM); U4: entity work.genlfsrGPRS(behavioral) generic map (widthGPRS => widthGPRS ,lengthGPRS => lengthGPRS ,tapsGPRS => tapsGPRS) port map(rst_nGPRS => rst_nGPRS ,clkGPRS => clkGPRS ,doutGPRS =>doutGPRS); U5: entity work.genlfsrLTE(behavioral) generic map (widthLTE => widthLTE ,lengthLTE => lengthLTE ,tapsLTE => tapsLTE) port map(rst_nLTE => rst_nLTE ,clkLTE => clkLTE ,doutLTE =>doutLTE); U6: entity work.genlfsrDVB(behavioral) generic map (widthDVB => widthDVB ,lengthDVB => lengthDVB ,tapsDVB => tapsDVB) port map(rst_nDVB => rst_nDVB ,clkDVB => clkDVB ,doutDVB =>doutDVB); U7: entity work.genlfsrCDMA2000(behavioral) generic map (widthCDMA2000 => widthCDMA2000 ,lengthCDMA2000 => lengthCDMA2000 ,tapsCDMA2000 => tapsCDMA2000) port map(rst_nCDMA2000 => rst_nCDMA2000 ,clkCDMA2000 => clkCDMA2000 ,doutCDMA2000 =>doutCDMA2000); U8: entity work.genlfsr802154g(behavioral) generic map (width802154g => width802154g ,length802154g => length802154g ,taps802154g => taps802154g) port map(rst_n802154g => rst_n802154g ,clk802154g => clk802154g ,dout802154g =>dout802154g); U9: entity work.genlfsr80220(behavioral) generic map (width80220 => width80220 ,length80220 => length80220 ,taps80220 => taps80220) port map(rst_n80220 => rst_n80220 ,clk80220 => clk80220 ,dout80220 =>dout80220); U10: entity work.genlfsr80216b(behavioral) generic map (width80216b => width80216b ,length80216b => length80216b ,taps80216b => taps80216b) port map(rst_n80216b => rst_n80216b ,clk80216b => clk80216b ,dout80216b =>dout80216b); U11: entity work.genlfsrHSDPA(behavioral) generic map (widthHSDPA => widthHSDPA ,lengthHSDPA => lengthHSDPA ,tapsHSDPA => tapsHSDPA) port map(rst_nHSDPA => rst_nHSDPA ,clkHSDPA => clkHSDPA ,doutHSDPA =>doutHSDPA); U12: entity work.genlfsrIS95(behavioral) generic map (widthIS95 => widthIS95 ,lengthIS95 => lengthIS95 ,tapsIS95 => tapsIS95) port map(rst_nIS95 => rst_nIS95 ,clkIS95 => clkIS95 ,doutIS95 =>doutIS95); process (doutGPRS, doutCDMA2000,doutUMTS,doutGSM,doutLTE,doutDVB,doutWCDMA,dout802154g,dout 80220, Sel) is begin s <= (others=>'0'); if Sel = "0000" then s(29 downto 29-doutCDMA2000'high) <= doutCDMA2000 ; elsif Sel = "0010" then s(29 downto 29-doutGPRS'high) <= doutGPRS; elsif Sel = "0100" then s(29 downto 29-doutUMTS'high) <= doutUMTS; elsif Sel = "0110" then s(29 downto 29-doutGSM'high) <= doutGSM; elsif Sel = "1000" then s(29 downto 29-doutLTE'high) <= doutLTE; elsif Sel = "1010" then s(29 downto 29-doutDVB'high) <= doutDVB; elsif Sel = "1100" then s(29 downto 29-doutWCDMA'high) <= doutWCDMA; elsif Sel = "0011" then s(29 downto 29-dout80216b'high) <= dout80216b; elsif Sel = "1001" then s(29 downto 29-doutIS95'high) <= doutIS95; elsif Sel = "0001" then s(29 downto 29-doutHSDPA'high) <= doutHSDPA; elsif Sel = "1111" then s(29 downto 29-dout802154g'high) <= dout802154g; else s(29 downto 29-dout80220'high) <= dout80220; end if ; end process; end Behavioral; My probleme show in red and compilation of create timing constraints with Project navigator ISE is : ERROR:HDLParsers:164 - "C:/Users/PROXIMEDIA/Documents/ISE-file/scrambler/scrambler.vhd" Line 93. parse error, unexpected IDENTIFIER please help me
