I want an error when I examine my vhdl program with Project NAvigator
ISE this is the error :
"Bitgen:342 - This design contains pins which have locations (LOC) that
are not user-assigned or I/O Standards (IOSTANDARD) that are not
user-assigned. This may cause I/O contention or incompatibility with
the board power or connectivity affecting performance, signal integrity
or in extreme cases cause damage to the device or the components to
which it is connected. To prevent this error, it is highly suggested to
specify all pin locations and I/O standards to avoid potential
contention or conflicts and allow proper bitstream creation. To demote
this error to a warning and allow bitstream creation with unspecified
I/O location or standards, you may apply the following bitgen switch: -g
UnconstrainedPins:Allow"
please help me
thanks