variable vhdl

OP (Company: ISIMSfax) #3246023
Rate this post
• ▲ useful
▼ not useful
good morning
this is my vhdl code
1
library ieee  ; 
2
use ieee.std_logic_1164.all  ; 
3
use ieee.std_logic_arith.all  ;
4
use ieee.numeric_std.all;
5
use std.textio.all;
6
library work;
7
use work.genlfsr_pkgg.all;
8
-- use work.genlfsr_pkg.all;
9

10
ENTITY composantscrambler  IS 
11
  port ( e   : in  std_logic_vector (29 downto 0); 
12
         Sel : in  std_logic_vector  (3 downto 0);
13
         s   : out std_logic_vector (29 downto 0)
14
        );
15
END ;
16

17
process (doutGPRS, doutCDMA2000,doutUMTS,doutGSM,doutLTE,doutDVB,doutWCDMA,dout802154g,dout80220, Sel) is
18
   begin
19
      
20
if Sel = "0000" then 
21
  s <= doutCDMA2000 ;
22
elsif Sel = "0010" then 
23
  
24
  s <= doutGPRS;
25
elsif Sel = "0100" then 
26
    
27
    s <= doutUMTS;
28
elsif Sel = "0110" then 
29
   
30
    s <= doutGSM;
31
elsif Sel = "1000" then 
32
     
33
    s <= doutLTE;
34
elsif Sel = "1010" then 
35
  
36
    s <= doutDVB;
37
elsif Sel = "1100" then 
38
   
39
    s <= doutWCDMA;
40
elsif Sel = "0011" then 
41
    
42
    s <= dout80216b;
43
elsif Sel = "1001" then 
44
  
45
    s <= doutIS95;
46
elsif Sel = "0001" then 
47
     
48
    s <= doutHSDPA;
49
elsif Sel = "1111" then 
50
  
51
    s <= dout802154g;
52
else 
53
   
54
  s <= dout80220;
55
 end if ; 
56
 
57
 end process;

When I do simulation I got error (** Fatal: (vsim-3420) Array lengths do 
not match. Left is 30 (29 downto 0). Right is 14 (13 downto 0).
#    Time: 0 ns  Iteration: 0  Process: /composantscrambler/line__320 
File: C:/modeltech_10.0c/examples/composant-scrambler.vhd
# Fatal error in Process line__320 at 
C:/modeltech_10.0c/examples/composant-scrambler.vhd line 339) because I 
fixed s to std_logic_vector (29 downto 0) then it take differen value 
(doutIS95 , dout802154g, etc )
So what I can do ?
thanks
Moderator (Company: Titel) #3246389
Rate this post
• ▲ useful
▼ not useful
> I fixed s to std_logic_vector (29 downto 0) then it take differen value
> (doutIS95 , dout802154g, etc )
> So what I can do ?
You can either (1) truncate the long vector or (2) lengthen the 
short one.

In the first case (1) you can assign a default value (others=>'0') to s 
and assign only the relevant bits:
1
process (doutGPRS, doutCDMA2000, doutUMTS, doutGSM, doutLTE, doutDVB, doutWCDMA, dout802154g, dout80220, Sel) is
2
   begin
3
      s <= (others=>'0'); -- default value
4
      if    Sel = "0000" then  s(29 downto 29-doutCDMA2000'high) <= doutCDMA2000 ;
5
      elsif Sel = "0010" then  s(29 downto 29-doutGPRS'high)     <= doutGPRS; 
6
      elsif Sel = "0100" then  s(29 downto 29-doutUMTS'high)     <= doutUMTS;
7
      elsif Sel = "0110" then  s(29 downto 29-doutGSM'high)      <= doutGSM;
8
      ....
9
      else                     s(29 downto 29-dout80220'high)    <= dout80220;
10
   end if ;  
11
 end process;
This was left aligned.
You can also do it right aligned:
1
process (doutGPRS, doutCDMA2000, doutUMTS, doutGSM, doutLTE, doutDVB, doutWCDMA, dout802154g, dout80220, Sel) is
2
   begin
3
      s <= (others=>'0'); -- default value
4
      if    Sel = "0000" then  s(doutCDMA2000'range) <= doutCDMA2000 ;
5
      elsif Sel = "0010" then  s(doutGPRS'range)     <= doutGPRS;
6
      elsif Sel = "0100" then  s(doutUMTS'range)     <= doutUMTS;
7
      elsif Sel = "0110" then  s(doutGSM'range)      <= doutGSM;
8
      ....
9
      else                     s(dout80220'range)    <= dout80220;
10
   end if ;  
11
 end process;
Got the idea? Its faily simple, isn't it?


And the second case (2) is already solved :
A few days ago the very same question popped up. Maybe it was asked by 
a classmate of you. He had the error in line 332. Have a look around 
here in the forum. If you try a search for "fatal error" you will find 
the solution: https://embdev.net/topic/302406.

> use ieee.std_logic_arith.all  ;
> use ieee.numeric_std.all;
Who teaches you to use them both together?

> use std.textio.all;
You know that that package is not synthesizeable?

Reply

Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.

Formatting
  • [c]C-Code[/c]
  • [vhdl]VHDL-Code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]
  • [[Title]] – link to an article
  • Link to another post: right-click its post ID (#8078628), copy the address, paste it into the text

More about formatting

Post long source code as an attachment, not in the text.

Already registered? Log in

Not shown to anyone. We send you a link; your post appears once you confirm it there.

By submitting you create a free account and accept the terms of use.