Is there a way to simulate a digital to analog converter in ModelSim????? I have my Verilog code that produces the 16 bit input to a DAC . It would be really nice if I could somehow see the analog waveform in simulation...
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You could write your own behaviour model, if timing etc. is important. Otherwise, if you just want to see an analog representation of your digital value, use the context menu in your wave table (right-click on the signal name), then in the context menu use > Format > Analog. Ther exists a version (automatic) and (custom). Automatic may serve as a start, use custom to fit your needs afterwards.
> It would be really nice if I could somehow see the analog waveform > in simulation... So just change the view (right click on the signals name in the waveform) of that particular waveform. So you can select amongst "vector", "signed decimal", "unsinged decimal", ... and "analog". Then you get something like that: http://www.lothar-miller.de/s9y/categories/38-LFSR http://www.lothar-miller.de/s9y/archives/38-DDFS-mit-Distributed-ROM.html And of course there's google: https://www.google.de/search?q=modelsim+analog+waveform
I think it is not just the analog view, he needs, but the timing of a ADC. Some of them have parallel interfaces with criital PLL issues and others come with I2C for instance. What I also directly thought of, when reading this issue, was the modelling of the anti aliasing Filter in VHDL. Anybody did this already?
pls i need digital to analog converter coding..pls send me sir
Surender wrote: > pls i need digital to analog converter coding. Why hijacking an old zombie thread for a NEW question? > pls send me sir Usually we do it that way: YOU say in detail what you need (what HDL? what DAC? what interface?)and then YOU show what YOU already have and what problems you encounter with that. Then WE discuss some solutions and YOU implement them. But we don't do YOUR homework. And if its no homework, but instead commercially: what do you need and what do you PAY for that solution?
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