Hello, Can anyone help me out in writting the VHDL code for interleaver and deinterleaver or if some one can guide me how to write it or its basics. All i know that i have to declare ROM and RAM's , but how I have no idea. Any type of favour or help will be highly appreciated. Please any one help me out. Your help means alot to me. THanks
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Please read your post again. And imagine, you were someone else, who only knows what you have written. Do you think anyone can give a helpful answer without knowing anything about what your problem is?
I also want interleaver quickly. I also have problems in writing code. Please help my urgently. Come to my office, analyse my problem and write code for me, so I can get good marks in school and become good engineer.
here's the code:
1 | toggle_proc: process (clk) |
2 | begin
|
3 | if rising_edge (clk) then |
4 | interleave_controller_ff <= not interleave_controller_ff; |
5 | end if; |
6 | end process; |
1 | interleave_proc: process (clk) |
2 | begin
|
3 | if rising_edge (clk) then |
4 | if interleave_controller_ff = '0' then |
5 | output_interleave_controller_1 <= signal_input; |
6 | else
|
7 | output_interleave_controller_2 <= signal_input; |
8 | end if; |
9 | end if; |
10 | end process; |
...and the deinterleaver:
1 | deinterleave_proc: process (clk) |
2 | begin
|
3 | if rising_edge (clk) then |
4 | if interleave_controller_ff = '1' then |
5 | resulting_output_of_interleave_controller <= |
6 | output_interleave_controller_1; |
7 | else
|
8 | resulting_output_of_interleave_controller <= |
9 | output_interleave_controller_2; |
10 | end if; |
11 | end if; |
12 | end process; |
Note: Not yet simulated, but it may give you an idea...
Syed Imam wrote: > Can anyone help me out in writting the VHDL code for interleaver and > deinterleaver or if some one can guide me how to write it or its basics. Sure somebody can. But: What do you want to interleave (and subsequntly deinterleave)? Whats the target platform? What toolchain do you use? Where does data come from? Where does it go to? What width has the data path? What speed (bits/s or bytes/s) is desired? May this be any kind of homework for school? > All i know that i have to declare ROM and RAM's , So indeed you know much more than anybody else here! Why don't you tell us a little bit more?
For LOTHAR MILLER I GUESS NOW I HAVE TOLD WHAT IS MY TARGET PLATFORM? WHERE DOES DATA COME FROM AND WHERE DOES IT GO? Interleaver (what is basically interleaver) The main function of the interleaver is to prevent the data information to be affected by interference which, as shown below in fig(11), results in burst error in wireless transmission. Indeed, due to the interference and noise, chunks of data errors can be retrieved in the data streams after the air transmission. As the burst errors are spread out after the interleaving process, the detection of errors is easier. Thus more errors can be corrected; as a result, the Bit Error Rate can be reduced. Interleaver (why i need ROM and RAM) as I said earlier The process of interleaving is mainly achieved by the use of RAM 1, RAM 2 1st permutation, and RAM 3. First, the RAM store the data stream in the same order as it receives them. Then, data are transmitted to the RAM 2 where they are stored at random address location defined by the ROM 1st permutation. The ROM 1st permutation is in fact executing the first permutation by giving the storing address in a manner which follows the equation of the first permutation defined earlier in the report. Finally, the RAM 3 is working in the same way as RAM 2 but instead of receiving the storing addresses from ROM 1st permutation, it receives the addresses from ROM 3 which applies the permutation defined by the second equation of the standard as shown below in fig(2)
MY MAIN TASK IS TO GET THE DATA lets suppose 1 byte data or any data in form of array interleaver it and then de-interleaver so that it should recover any lost data due to noise any type of help will be highly appreciated thanks
Hello, Can someone help me with deinterleaver verilog coding please?,So here is why I need it Imagine there is a data lost while transferring as a result of noise or interference or any other external factors.By deinterleaving that I need to back it up. Thanks in advance.
Syed I. wrote: > Interleaver/deinterleaver *VHDL* Lobsang wrote: > Can someone help me with deinterleaver verilog coding please? Pls start a NEW thread with a CORRECT thread title! And in that NEW thread you should shwo what you have, and if you don't have anything, then you should answer the questions in the https://embdev.net/topic/284809?edit=4996235#3019150 at least...
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