Hello, using TC1796 microprocessor, can't disable and enable interrupts
around critical sections of code.
Referring to the Tricore Architecture Volume 1 manual:
The processor is running in User-1. In this mode you should be able to
disable and enable interrupts.
checked in debugger, register PSW.IO = 0x01, User-1 Mode, "Tasks at this
level may disable interrupts." (quoting the above manual)
Using the following C code to enable/disable interrupts:
asm volatile ("enable" : : : "memory");
asm volatile ("disable" : : : "memory");
Stepping through these lines of assembler in the debugger, register
ICR.IE (Global Interrupt Enable) is always set.
Why are global interrupts not being disabled?
Peter .. wrote: > Stepping through these lines of assembler in the debugger, register > ICR.IE (Global Interrupt Enable) is always set. What debugger do you have? > Why are global interrupts not being disabled? Maybe the debugger needs an interrupt itself and so you cannot disable global interrupts during debugging...
Using the debugger "Trace32 Powerview for Tricore", ver R.2011.06.000032911. I've been reading up on the Core Debug Controller in the Tricore Architecture Volume 1 manual (v1.3). Ummm, doesn't say anything about using an interrupt for debugging. When I find the solution I'll post it here...
Also checked the TC1796 errata. Only related issue is CPU_TC.083 "Interrupt may be taken following DISABLE instruction" where the workaround is add a nop after disable. Checked and already have this in my code.