Please help for 4-bit ALU

OP #2742894
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Hi all!

I am trying to make a 4 bit ALU. Here is a sample entity declaration:

entity myALU is
  Port ( Opcode : in  STD_LOGIC_VECTOR (2 downto 0);
         Ain, Bin : in  STD_LOGIC_VECTOR (3 downto 0); --Operand 1 and 2
         Cin : in  STD_LOGIC;  -- carry in
         Output : out  STD_LOGIC_VECTOR (3 downto 0);
         Zero : out  STD_LOGIC;
         Co : out  STD_LOGIC
        );
end myALU;


The ALU should perform the following operations according to the Opcode:


Opcode  |  Operation  |  Output     |  Carry Out(Co)  |
000     |    NOP      |     A       |    0
001     |    AND      |   A & B     |    0
010     |    OR       |   A or B    |    0
011     |   XOR       |   A xor B   |    0
100     |  ADD        |   A + B     |'1' if (A + B) > $F, else '0'
101     |  ADC        |   A+B+Cin   |'1' if (A + B + Cin) > $F else '0'
110     |  SUB        |  |A - B|    |'1' if (A < B), else '0'
111     |  SBC        | |Cin + A-B| |'1' if (A + Cin) < B, else '0'

[Zero <= '1' if Output is 0, else '0']


Can someone please help me write a VHDL code for that ALU,
You can find attached the code that I have written but it doesn't work 
and I am consfused.

Thank you.
Attached files:
Moderator (Company: Titel) #2743078
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peres Z. wrote:
> I did it but I have wrong values
WHAT values?
For help you MUST provide as much information as possible. Who do you 
think can help when you say: "My car doesn't run! Whats wrong with it?"

And think again about this what Daniel M. wrote:
>> At least the sensitivity-list is incomplete.
Z, Cin and Cx is missing! And because of the missing Z you will see some 
very very strange bahviour...

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