Ciao, Dovrei realizzare la descrizione VHDL di un moltiplicatore digitale che realizzi l’algoritmo di Booth(con codifica a 2 bit) per due moltiplicandi rappresentati su N ed M bit rispettivamente e con risultato su N+M bit. Posto il codice sorgente del moltiplicatore(A) e del test bench(B) che ho provato a scrivere. Qualcuno potrebbe dirmi se è corretto? A) library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity booths is GENERIC(k : POSITIVE := 7); --input number word length less one Port ( a,b : in STD_LOGIC_VECTOR (k downto 0); mul : out STD_LOGIC_VECTOR (2*k+1 downto 0)); end booths; architecture Behavioral of booths is begin process(a,b) variable m: std_logic_vector (2*k+1 downto 0); variable s: std_logic; begin m:="00000000"&b; s:='0'; for i in 0 to k loop if(m(0)='0' and s='1') then m(k downto k-3):= m(k downto k-3)+a; s:=m(0); m(k-1 downto 0):=m(k downto 1); elsif(m(0)='1' and s='0') then m(k downto k-3):= m(k downto k-3)-a; s:=m(0); m(k-1 downto 0):=m(k downto 1); else s:=m(0); m(k-1 downto 0):=m(k downto 1); end if; end loop; mul<=m; end process; end Behavioral; B)library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity Testbench_di_Booth is end Testbench_di_Booth; architecture behavior of Testbench_di_Booth is component booths GENERIC(k : POSITIVE := 7); --input number word length less one Port( a,b : in STD_LOGIC_VECTOR (k downto 0); mul : out STD_LOGIC_VECTOR (2*k+1 downto 0)); end component; --Inputs signal A : STD_LOGIC_VECTOR (7 downto 0):= "00000011"; signal B : STD_LOGIC_VECTOR (7 downto 0):= "00000100"; --Outputs signal MUL : STD_LOGIC_VECTOR(15 downto 0); begin --Instantiate the UnitUnder Test (UUT) uut: booths PORT MAP (a => A, b => B, mul => MUL); --Stimulus process stim_proc: process begin --insert stimulus here A<="00000011"; B<="00000100"; wait for 500 fs; A<="00000110"; B<="00000111"; wait for 500 fs; A<="00001011"; B<="00000100"; wait for 500 fs; wait; end process; end;
No, così no! There is a lot of people here which is willing to help you if they can, but nobody wants to spend time for formatting and translation. Please : - Ask your question in english - Format your code in a decent way. a) add your source as separate file b) use
tags around your code And please, pay attention your code is readable by having a correct indentation.
Now it happend to me. - use the following [vhdl] tags for formatting
Hello, I should realize the VHDL description of a digital multiplier that realize Booth's algorithm (encoded in 2 bits) for two terms represented on N and M bits, respectively, and with a result of N + M bits. I have attached the 2 files: 1)booth that should implement the booth's algorithm 2)test that should simulate Are they correct to implement and simulate a booth's multiplier? please help me.
> Are they correct to implement and simulate a booth's multiplier? You have a testbench. Why don't you try it out?
I wrote and simulated with ALDEC ACTIVE-HDL Student Edition. Compile the code and i have 0 Errors, but in the simulation the result of multiplication is "UUUU" and the WAVEFORM panel is empty. so I thought that the codes are wrong.
You have to lern to use the simulator and maybe a little bit more about VHDL. > WAVEFORM panel is empty. The signals are not automatically added to the waveform windows. You have to select the desired signals and add them to the window. This is usually done by dragging the signals with the mouse from the signals window to the waveform window. Read the tutorial for your simulator. "U" means that the signal was never initialized or assigned. This indeed points out that something went wrong. Look at the intermediate signals to see where you failed.
8 bit multiplier booth code
can you please do the VHDL code for 6X6 BOOTH multiplication
Hi everyone my name is Mehdi and i am a Electronic Engineering student in mastre degree I need a VHDL code about modified Booth multiplier help me if possible . thank all of you so much .
Too easy copy paste VHDL code done by others for your Integrated System Architecture exam. Study +++ googling ---
Mehdi wrote: > help me if possible "Help" consists of "you" starting with something and "we" try to get you further on with some hints on a particular problem. That whole process is called "learning"...