> ie it works when count="0001000100010111000000" and it is not working
> when count ="0000111110001001010001" in the if condition.
Why do you not count with integers? Then you can write
1 | if(count>0 and count<49) then ...
|
instead of
1 | if(count>"000000000000000000000" and count<"000000000000000110001") then ...
|
You have a VERY UNUSUAL way to describe clocked processes:
1 | process(temp1,reset,templock)
|
2 | begin
|
3 | if(reset='1' and templock='1') then
|
4 | if(count>"000000000000000000000" and count<"000000000000000110001") then
|
5 | if falling_edge(temp1) then --- Huh, a clock. Here?
|
Additionally you muddle up combinational and clocked processes. And you
also have two clocks in one process:
1 | process(temp1,data,intaddr,reset,templock)
|
2 | begin
|
3 | if(reset='1' and templock='1') then -- first combinational
|
4 | if(count>"000000000000000000000" and count<"000000000000000110001") then
|
5 | if rising_edge(temp1) then -- then a clock
|
6 | :
|
7 | end if;
|
8 | elsif(count = "000000000000000110001") then -- then combinational
|
9 | if rising_edge(temp1) then -- and again a clock
|
10 | :
|
11 | intaddr<=intaddr+1;
|
12 | end if;
|
13 | else -- further on combinational
|
14 | :
|
15 | data<=LETTER_DB(conv_integer(intaddr));
|
16 | end if;
|
17 | else
|
18 | intaddr <= "0000000";
|
19 | :
|
20 | end if;
|
21 | end process;
|
I urge you to have a close look how others are doing it. Although your
description may work (because synthesizers get better each day), you
will NOT see this style in any book!
> if rising_edge(temp1) then
> if falling_edge(temp1) then
In a synchronous design there is only 1 clock. Thats the "one and only"
system clock. And the whole design uses the same edge of this clock.
temp1 sounds not like a system clock... :-/