the program is for a simple multiplier using addition of the partial
products. i find problem only with final addition part pls help me out
1 | architecture Behavioral of new_twin1 is
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2 | type arr is array (3 downto 0) of std_logic_vector(3 downto 0);
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3 | type arr2 is array(4 downto 0) of std_logic_vector(7 downto 0);
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4 | signal and_1:arr:=("0000","0000","0000","0000");
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5 | signal t6:arr2:=("00000000","00000000","00000000","00000000","00000000");
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6 | signal temp:std_logic_vector(3 downto 0);
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7 | signal sum:std_logic_vector(7 downto 0):="00000000";
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8 | begin
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9 | process(clk)
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10 | variable z,t,k:integer;
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11 | variable t2:std_logic_vector(3 downto 0):="0000";
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12 | variable t7:std_logic_vector(7 downto 0);--:="00000000";
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13 | begin
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14 | for i in 0 to 3 loop
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15 | t6(i)(7 downto 0)<=("00000000");
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16 | end loop;
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17 | for i in 0 to 3 loop
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18 | for j in 0 to 3 loop
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19 | and_1(i)(j)<=(x(i) and y(j));
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20 | end loop;
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21 | end loop;
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22 | t6(3)<= "0000" & and_1(0);
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23 | k:=0;
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24 | for i in 2 downto 0 loop
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25 | t6(i)<=t2( i downto 0) & and_1(k+1) & t2(k downto 0);
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26 | k:=k+1;
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27 | end loop;
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28 | for i in 0 to 3 loop
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29 | t6(4)<=t6(4)+t6(i);
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30 | end loop
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31 | ----just tried this alternative which too dint work---
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32 | -- t6(4)<=t6(0);
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33 | -- t6(4)<=t6(4)+t6(1);
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34 | -- t6(4)<=t6(4)+t6(2);
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35 | -- t6(4)<=t6(4)+t6(3);
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36 | end process;
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37 | end Behavioral;
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the final for loop for addition is giving me a gig-up.when i try to
access one variable inside the array am able to retrieve it but while
adding to the same, the total value tends to undefined(XXXXXXXX).
please suggest any modification
thanks in advance
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