1 | $ arm-none-eabi-gcc --target-help
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2 | The following options are target specific:
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3 | -mabi= Specify an ABI
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4 | -mabort-on-noreturn Generate a call to abort if a noreturn function
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5 | returns
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6 | -mandroid Generate code for the Android operating system.
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7 | -mapcs-float Pass FP arguments in FP registers
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8 | -mapcs-frame Generate APCS conformant stack frames
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9 | -mapcs-reentrant Generate re-entrant, PIC code
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10 | -march= Specify the name of the target architecture
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11 | -mbig-endian Assume target CPU is configured as big endian
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12 | -mcallee-super-interworking Thumb: Assume non-static functions may be called
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13 | from ARM code
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14 | -mcaller-super-interworking Thumb: Assume function pointers may go to non-
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15 | Thumb aware code
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16 | -mcirrus-fix-invalid-insns Cirrus: Place NOPs to avoid invalid instruction
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17 | combinations
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18 | -mcpu= Specify the name of the target CPU
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19 | -mfix-cortex-m3-ldrd Avoid overlapping destination and address
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20 | registers on LDRD instructions that may trigger
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21 | Cortex-M3 errata.
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22 | -mfloat-abi= Specify if floating point hardware should be used
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23 | -mfp16-format= Specify the __fp16 floating-point format
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24 | -mfpu= Specify the name of the target floating point
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25 | hardware/format
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26 | -mhard-float Alias for -mfloat-abi=hard
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27 | -mlittle-endian Assume target CPU is configured as little endian
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28 | -mlong-calls Generate call insns as indirect calls, if
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29 | necessary
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30 | -mpic-register= Specify the register to be used for PIC addressing
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31 | -mpoke-function-name Store function names in object code
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32 | -msched-prolog Permit scheduling of a function's prologue
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33 | sequence
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34 | -msingle-pic-base Do not load the PIC register in function prologues
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35 | -msoft-float Alias for -mfloat-abi=soft
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36 | -mstructure-size-boundary= Specify the minimum bit alignment of structures
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37 | -mthumb Compile for the Thumb not the ARM
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38 | -mthumb-interwork Support calls between Thumb and ARM instruction
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39 | sets
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40 | -mtp= Specify how to access the thread pointer
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41 | -mtpcs-frame Thumb: Generate (non-leaf) stack frames even if
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42 | not needed
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43 | -mtpcs-leaf-frame Thumb: Generate (leaf) stack frames even if not
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44 | needed
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45 | -mtune= Tune code for the given processor
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46 | -mvectorize-with-neon-quad Use Neon quad-word (rather than double-word)
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47 | registers for vectorization
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48 | -mword-relocations Only generate absolute relocations on word sized
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49 | values.
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50 | -mwords-little-endian Assume big endian bytes, little endian words
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51 |
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52 | Known ARM CPUs (for use with the -mcpu= and -mtune= options):
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53 | cortex-m0, cortex-m1, cortex-m3, cortex-r4f, cortex-r4, cortex-a9,
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54 | cortex-a8, cortex-a5, arm1156t2f-s, arm1156t2-s, mpcore, mpcorenovfp,
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55 | arm1176jzf-s, arm1176jz-s, arm1136jf-s, arm1136j-s, arm1026ej-s, arm926ej-s,
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56 | iwmmxt2, iwmmxt, xscale, arm1022e, arm1020e, arm10e, arm968e-s, arm966e-s,
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57 | arm946e-s, arm9e, arm1020t, arm10tdmi, ep9312, arm940t, arm922t, arm920t,
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58 | arm920, arm9tdmi, arm9, arm740t, arm720t, arm710t, arm7tdmi-s, arm7tdmi,
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59 | strongarm1110, strongarm1100, strongarm110, strongarm, arm810, arm8,
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60 | arm7dmi, arm7dm, arm7m, arm7500fe, arm7500, arm7100, arm710c, arm720,
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61 | arm710, arm700i, arm700, arm70, arm7di, arm7d, arm7, arm620, arm610, arm600,
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62 | arm60, arm6, arm3, arm250, arm2
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63 |
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64 | Known ARM architectures (for use with the -march= option):
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65 | iwmmxt2, iwmmxt, ep9312, armv7e-m, armv7-m, armv7-r, armv7-a, armv7,
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66 | armv6-m, armv6t2, armv6zk, armv6z, armv6k, armv6j, armv6, armv5te, armv5e,
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67 | armv5t, armv5, armv4t, armv4, armv3m, armv3, armv2a, armv2
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68 | ARM-specific assembler options:
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69 | -k generate PIC code
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70 | -mthumb assemble Thumb code
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71 | -mthumb-interwork support ARM/Thumb interworking
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72 | -mapcs-32 code uses 32-bit program counter
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73 | -mapcs-26 code uses 26-bit program counter
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74 | -mapcs-float floating point args are in fp regs
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75 | -mapcs-reentrant re-entrant code
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76 | -matpcs code is ATPCS conformant
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77 | -mbig-endian assemble for big-endian
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78 | -mlittle-endian assemble for little-endian
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79 | -mapcs-frame use frame pointer
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80 | -mapcs-stack-check use stack size checking
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81 | -mno-warn-deprecated do not warn on use of deprecated feature
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82 | -mcpu=<cpu name> assemble for CPU <cpu name>
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83 | -march=<arch name> assemble for architecture <arch name>
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84 | -mfpu=<fpu name> assemble for FPU architecture <fpu name>
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85 | -mfloat-abi=<abi> assemble for floating point ABI <abi>
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86 | -meabi=<ver> assemble for eabi version <ver>
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87 | -mimplicit-it=<mode> controls implicit insertion of IT instructions
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88 | -EB assemble code for a big-endian cpu
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89 | -EL assemble code for a little-endian cpu
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90 | --fix-v4bx Allow BX in ARMv4 code
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91 |
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92 | Linker options
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93 | ==============
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94 |
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95 | Use "-Wl,OPTION" to pass "OPTION" to the linker.
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96 |
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97 | armelf:
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98 | --build-id[=STYLE] Generate build ID note
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99 | -Bgroup Selects group name lookup rules for DSO
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100 | --disable-new-dtags Disable new dynamic tags
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101 | --enable-new-dtags Enable new dynamic tags
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102 | --eh-frame-hdr Create .eh_frame_hdr section
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103 | --hash-style=STYLE Set hash style to sysv, gnu or both
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104 | -z combreloc Merge dynamic relocs into one section and sort
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105 | -z defs Report unresolved symbols in object files.
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106 | -z execstack Mark executable as requiring executable stack
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107 | -z initfirst Mark DSO to be initialized first at runtime
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108 | -z interpose Mark object to interpose all DSOs but executable
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109 | -z lazy Mark object lazy runtime binding (default)
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110 | -z loadfltr Mark object requiring immediate process
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111 | -z muldefs Allow multiple definitions
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112 | -z nocombreloc Don't merge dynamic relocs into one section
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113 | -z nocopyreloc Don't create copy relocs
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114 | -z nodefaultlib Mark object not to use default search paths
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115 | -z nodelete Mark DSO non-deletable at runtime
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116 | -z nodlopen Mark DSO not available to dlopen
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117 | -z nodump Mark DSO not available to dldump
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118 | -z noexecstack Mark executable as not requiring executable stack
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119 | -z now Mark object non-lazy runtime binding
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120 | -z origin Mark object requiring immediate $ORIGIN
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121 | processing at runtime
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122 | -z max-page-size=SIZE Set maximum page size to SIZE
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123 | -z common-page-size=SIZE Set common page size to SIZE
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124 | -z KEYWORD Ignored for Solaris compatibility
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125 | --thumb-entry=<sym> Set the entry point to be Thumb symbol <sym>
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126 | --be8 Output BE8 format image
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127 | --target1=rel Interpret R_ARM_TARGET1 as R_ARM_REL32
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128 | --target1=abs Interpret R_ARM_TARGET1 as R_ARM_ABS32
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129 | --target2=<type> Specify definition of R_ARM_TARGET2
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130 | --fix-v4bx Rewrite BX rn as MOV pc, rn for ARMv4
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131 | --fix-v4bx-interworking Rewrite BX rn branch to ARMv4 interworking veneer
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132 | --use-blx Enable use of BLX instructions
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133 | --vfp11-denorm-fix Specify how to fix VFP11 denorm erratum
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134 | --no-enum-size-warning Don't warn about objects with incompatible
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135 | enum sizes
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136 | --no-wchar-size-warning Don't warn about objects with incompatible
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137 | wchar_t sizes
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138 | --pic-veneer Always generate PIC interworking veneers
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139 | --stub-group-size=N Maximum size of a group of input sections that can be
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140 | handled by one stub section. A negative value
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141 | locates all stubs after their branches (with a
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142 | group size of -N), while a positive value allows
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143 | two groups of input sections, one before, and one
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144 | after each stub section. Values of +/-1 indicate
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145 | the linker should choose suitable defaults.
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146 | --[no-]fix-cortex-a8 Disable/enable Cortex-A8 Thumb-2 branch erratum fix
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