Guest
#1666026
Im using in my project a LPC2148 controller and have a question concerning I2C timing. Everything works quite well but when I proofed the timing of the I2C I discovered that the high time of the clock is wrong. With I2xSCL/H you can adjust the high and low time (duty cycle) of the clock. The value says how many clock cycles are used for high/low. My PCLK runs at 60MHz (I proofed that with a PWM Output, the frequenzy/duty cycle was exact the expected value). If I set I2xSCL/H to 75 the expected I2C data rate should be 400kHz. In reality it is about 384kHz because the high time of the clock is about 110ns too long (1.36us instead of 1.25us). The low time fits exactly (1.25us). This problem occurs on both I2C busses. Do you have any suggestion/experience on this topic? Thank you for some help.

