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Forum: µC & Digital Electronics RFM02 - not receiving nIRQ interrupt signal


von DarkSavior (Guest)


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Hi, im using an ATmega32 with RF02 at 868MHz. I think i made a mistake 
in programming or something. Because i am not receiving any signal from 
RFM nIRQ pin. Pin nIRQ should oscillate at a frequency right? On my 
scoop i can see it doesnt do anything at all. Help is really 
appreciated. This is my code:
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#include <avr/io.h>
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#include <stdlib.h>
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#include <avr/interrupt.h>
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#define F_CPU 10000000UL
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#include <util/delay.h>
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#define RF_PORT  PORTB
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#define RF_DDR  DDRB
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#define RF_PIN  PINB
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#define DDR_IN      0
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#define DDR_OUT    1
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#define PORT_SEL  PORTB
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#define PIN_SEL    PINB
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#define DDR_SEL    DDRB
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#define  PORT_SDI  PORTB
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#define PIN_SDI    PINB
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#define DDR_SDI    DDRB
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#define PORT_SCK  PORTB
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#define PIN_SCK    PINB
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#define DDR_SCK    DDRB
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#define PORT_NIRQ  PORTB
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#define PIN_NIRQ  PINB
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#define DDR_NIRQ  DDRB
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#define SCK    7  // SCK,  -> RF02
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#define NIRQ    6  // nIRQ, -> RF02
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#define SDI    5  // SDI,  -> RF02
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#define SEL    4  // nSEL, -> RF02
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#define DATA   3  // FSK,  -> RF02
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#define SEL_OUTPUT()   DDR_SEL  |= (1<<SEL)
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#define HI_SEL()    PORT_SEL |= (1<<SEL)
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#define LOW_SEL()    PORT_SEL &=~(1<<SEL)
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#define SDI_OUTPUT()  DDR_SDI  |= (1<<SDI)
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#define HI_SDI()    PORT_SDI |= (1<<SDI)
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#define LOW_SDI()    PORT_SDI &=~(1<<SDI)
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#define NIRQ_INPUT()  DDR_NIRQ  &=~(1<<NIRQ)
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#define NIRQ_HI()    PIN_NIRQ&(1<<NIRQ)
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#define SCK_OUTPUT()  DDR_SCK  |=(1<<SCK)
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#define HI_SCK()    PORT_SCK |=(1<<SCK)
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#define LOW_SCK()    PORT_SCK &=~(1<<SCK)
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unsigned int RFXX_WRT_CMD( unsigned int aCmd) {  // to send commands
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  unsigned char i;
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  unsigned int temp;
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  LOW_SCK();  // reset bit SCK
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  LOW_SEL();    // reset bit SEL
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  for(i=0;i<16;i++)
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    {
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    temp<<=1;  // temp=temp<<1;
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    if(NIRQ_HI()) {  
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    temp|=0x0001; // temp is a 16-bit integer
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    }
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  LOW_SCK();  // reset bit SCK
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    if(aCmd&0x8000) {  // if((aCmd&0x8000)==0x8000)
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    HI_SDI();  // set bit SDI
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    }
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    else {
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      LOW_SDI();// reset bit SDI
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    }
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      HI_SCK();  // set bit SCK to shift data from SDI pin to RFM
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      aCmd<<=1; // aCmd=aCmd<<1
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  }
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  LOW_SCK();  // reset bit SCK
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  HI_SEL();    // set bit SEL
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  return(temp);
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}
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void RF02B_SEND(unsigned char aByte) {  // send a byte
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  unsigned char i;
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  for(i=0;i<8;i++)
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    {
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  while(NIRQ_HI());  // polling nIRQ
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  while(!(NIRQ_HI()));
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  if(aByte&0x80)
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    {
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      PORTB|=(1<<DATA);  // set bit(FSK): request data input
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    }
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    else {
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    PORTB&=~(1<<DATA);  // reset bit(FSK): request data input
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      }
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    aByte<<=1;  // aByte=aByte<<1
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  }
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}
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void RFXX_PORT_INIT(void) { // initialise all neccesary ports
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  HI_SEL();    // set bit SEL
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  HI_SDI();    // set bit SDI
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  LOW_SCK();  // reset bit SCK
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  SEL_OUTPUT();  // set port SEL as output
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  SDI_OUTPUT(); // set port SDI as output
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  NIRQ_INPUT();  // set port SDO as input
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  SCK_OUTPUT(); // set port SCK as output
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}
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void Send (unsigned int byte) {
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  unsigned int i, j, ChkSum;
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  ChkSum=0;
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  RF02B_SEND(0xAA); // PREAMBLE
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  RF02B_SEND(0xAA); // PREAMBLE
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  RF02B_SEND(0xAA); // PREAMBLE
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  RF02B_SEND(0x54); // Sync byte
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  RF02B_SEND(byte);  // Data0
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  ChkSum+=byte;
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  RF02B_SEND(byte);  // Data1
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  ChkSum+=byte;
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  RF02B_SEND(byte);  // Data2
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  ChkSum+=byte;
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  RF02B_SEND(byte);  // Data3
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  ChkSum+=byte;
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  RF02B_SEND(byte);  // Data4
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  ChkSum+=byte;
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  RF02B_SEND(byte);  // Data5
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  ChkSum+=byte;
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  RF02B_SEND(byte);  // Data6
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  ChkSum+=byte;
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  RF02B_SEND(byte);  // Data7
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  ChkSum+=byte;
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  RF02B_SEND(ChkSum);// Data8
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  RF02B_SEND(0xAA);  // dummy byte
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  RFXX_WRT_CMD(0xC401);  // (8) TX off
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  for(i=0;i<5000;i++)
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  for(j=0;j<123;j++);
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}
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void main(void) {
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  RFXX_PORT_INIT();  // initialise all neccesary ports
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  RFXX_WRT_CMD(0xCC00); // read internal status register content
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  RFXX_WRT_CMD(0x9731); // (2) 
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            // b1=1,d1=1,d0=1,x1=1,x0=1,m0=1
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            // CLK freq 10MHz
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            // Band 868MHz 
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            // 10pF
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            // 60kHz deviation
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  RFXX_WRT_CMD(0xC031); // (3) 
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               // ex=1,es=1,dc=1
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              // enable crystal oscillator
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            // enable synthesizer
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            // disable CLK pin
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            // POWER AMPLIFY aanzetten?
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  RFXX_WRT_CMD(0xA640); // (4) 868MHz ( 860MHz + 6MHz )
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  RFXX_WRT_CMD(0xC823); // (5) 4.8kbps 0xC823 << nog delen door 2 (0xD040)
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              // r6=1,r2=1,r1=1,r0=1
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  RFXX_WRT_CMD(0xB000); // (6) no relative power output
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  RFXX_WRT_CMD(0xC220); // (7) ebs=1
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               // enable TX sync
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  RFXX_WRT_CMD(0xC464); // (8) TX off after 10us (0xC464)
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  PORTB|=(1<<DATA);    // set bit FSK
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  DDRB|=(1<DATA);    // set port FSK as output
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while(1) {
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  for( int i=0;i<=50;i++)
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  Send(0x0F);
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  for( int i=0;i<=50;i++)
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  Send(0xF0);
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  }
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}

von DarkSavior (Guest)


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Nvm, fixed it. Didnt set amplifier enable bit. Now i got problems with 
receiving. :P

von irek (Guest)


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Hey, did you fix it (receiving)?

von matzetronics (Guest)


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DarkSavior wrote:
> Now i got problems with
> receiving. :P

Always keep in mind to reset the receiver (RFM01) before a new packet is 
expected. This is done by flushing the FIFO and disabling and then 
re-enabling the receiver. Here's a small excerpt from one of my DMX 
Receivers, unfortunately in assembler. But i hope you get the idea:
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main:  ldi  ticker,0xff  ; periodical calls
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  clr  chksum  
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  ldi  YH,High(DMXSTART)
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  ldi  YL,low(DMXSTART)
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  rcall  w30us
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; reset the FIFO 
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  ldi  spihi,0xce
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  ldi  spilo,0x84
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  rcall  spiout
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  nop
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; restart the FIFO
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  ldi  spihi,0xce
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  ldi  spilo,0x87
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  rcall  spiout
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  nop
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main1:
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  dec  ticker        ; timeouter
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  rcall  rfmread      ; try to read something from the receiver
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  sbrs  flags, validbit  ; if theres something valid throw it on the console
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  rjmp  main1
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; received something
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  mov  spihi,temp    ; status 
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  rcall  usbout
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  cpi  YL,low(DMXEND)
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  brcs  main1
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  sbi  LEDPort,OVLED  ; LED flashes on full buffer 
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  rcall  w100ms
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  cbi  LEDPort,OVLED
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  rjmp  main
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; read RFM01 status byte into spihi, spilo and the next data byte from the fifo
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; the read command starts and continues with a 0 
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; data will be stored at Y
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rfmread:       ; read command
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  cbi  RFMPort,RFMOut  ; set to lo for the rest of this run
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  nop
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  cbi  RFMPort,RFMCs  ; select rx
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  ldi  counter,16  ; 16, read in the statusword
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  nop
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  sbi  RFMPort,RFMClk  ; strobe in the next bit
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  nop
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  clc
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  sbis  RFMPin,RFMIn  ; read
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  rjmp  rfmr2    ; no fifo there, skip this receiption
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  sec
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  rol  spilo    ; into 16 bit rollers
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  rol  spihi
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  dec  counter
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rfmr1:  nop
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  sbi  RFMPort,RFMClk  ; strobe in the next bit
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  nop
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  clc
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  sbic  RFMPin,RFMIn  ; read
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  sec
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  rol  spilo    ; into 16 bit rollers
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  rol  spihi
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  cbi  RFMPort,RFMClk
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  dec  counter
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  brne  rfmr1
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; now get the databyte
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; read in 8 bits
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  ldi  counter,8
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rfmr6:  nop
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  nop
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  nop
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  sbi  RFMPort,RFMClk  ; strobe pulse
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  clc
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  nop
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  nop
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  sbic  RFMPin, RFMIn  ; is it high ?
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  sec
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  rol  temp    ; from carry into lowest
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rfmr5:  nop
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  nop
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  cbi  RFMPort,RFMClk  ; clr the clock
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  dec  counter
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  brne  rfmr6
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  nop  
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  sbi  RFMPort,RFMCs  ; deselect RFM
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  st  Y+,temp    ; store in RAM
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  add  chksum,temp  ; add to the checksum
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  sbr  flags,valid    ; we have a valid reception
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  ret
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rfmr2:  cbr  flags,valid  ; no valid reception detected
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  cbi  RFMPort, RFMClk    ; unclock
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  sbi  RFMPort,RFMCs  ; deselect RFM
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  ret
This assumes a correctly setup prior to the main loop. I'm using 868 Mhz 
modules, YMMD.

von Martin Michael (Guest)


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DarkSavior THX
6 year's old but it helped me cool ahh I mean, LOL

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