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Forum: FPGA, VHDL & Verilog VHDL UART Design


VHDL UART Design
von Alexander S. (Company: Home) (alex_isr)

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Attached ModelSim VHDL design of UART.

Regards Alex.

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Re: VHDL UART Design
von Griz Lee (Guest)

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Ahhh one  more of this wannabe VHDL-top designs.

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Re: VHDL UART Design
von Alexander S. (Company: Home) (alex_isr)

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Griz Lee wrote:
> Ahhh one  more of this wannabe VHDL-top designs.

 Yes. And what you want or looking for ?

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Re: VHDL UART Design
von ktorkkelson (Guest)

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I guess only a chat bot... ;)

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