EmbDev.net

Forum: FPGA, VHDL & Verilog Lcdtft application is not working


Author: vijaya lakshmi (Guest)
Posted on:

Rate this post
0 useful
not useful
Hi,
    I am trying to interface Lcd tft display via SPI  with my custom 
board. I'm using Spartan 6 (part number :: XC6SLX9, speed grade :: -2, 
package ::  csg324). My initialization part, data sending part are 
proper in simulation, but I am not getting any pattern on my Lcd 
display.

     Where I suppose to check to debug the error..??

Thanks & Regards,
Vijji

Author: Lothar Miller (lkmiller) (Moderator)
Posted on:

Rate this post
0 useful
not useful
vijaya lakshmi wrote:
> Where I suppose to check to debug the error..??
First step ist to read the toolchains errors and warnings. If there are 
any you don't know what they mean and you are unsure about ignoring 
them, then you must check them thoroughly until you are really sure that 
you can go on with that message.

When simulation is ok, then you must check wether your hardware shows 
the same behaviour. So a logic analyzer to analyze the data stream would 
be the best...
But keep in mind: its very, very (indeed stupidly) easy to write HDL 
code that simulates properly and fails on hardware immediately.

> Where I suppose to check to debug the error..??
What HDL?
Maybe you can simply post those files as *.V or *.VHD attachments here. 
Its fairly easy to recognize critical parts in a beginners code... ;-)

Author: Vanvouver (Guest)
Posted on:

Rate this post
0 useful
not useful
If there is no output at all, this is caused in the most cases by one of 
the following reasons:

- No clock is available. Make a design that connects the clock signal 
directly to one of you outputs and check you can see a clock there.

- The design is in an continuous reset state due to false polarity of 
the reset signal.

- You forgot to constrain your signals to the correct FPGA pins. Check 
this first since it may damage your hardware.


Are you on an eval platform, or some other hardware? is the board proved 
to work in general?

Author: Vijaya Kalluri (vijji148)
Posted on:
Attached files:

Rate this post
0 useful
not useful
Hi Vanvouver,
  FPGA Board is working fine. I constrained signals properly.
  I generated reset in the top module itself, I didn't constraint reset 
signal.

  The attached file is nothing but waveforms of SPI and fsm_controller. 
check it once..

Thanks & Regards,
K Vijaya Lakshmi

: Edited by User
Author: Lothar Miller (lkmiller) (Moderator)
Posted on:

Rate this post
0 useful
not useful
vijaya lakshmi wrote:
> My initialization part, data sending part are proper in simulation
So, theres no use in sending screenshots from that.
Did you read my post?

> check it once..
Against WHAT? No one else but you knows anything about that "LCD with 
SPI interface". So maybe the timing is ok, or maybe not. Who can know?

> check it once..
You should do that. Didn't you?

Author: Vijaya Kalluri (vijji148)
Posted on:

Rate this post
0 useful
not useful
Hi Lothar,

   I will do it from scratch . I will keep in mind what you told,  As 
per your suggestion I will use logic analyzer to analyze the data stream 
.

Thanks & Regards,
Vijji

Author: Dajana Kroh (hummer90)
Posted on:

Rate this post
0 useful
not useful
Check the lcdtft timing requirements. Maybe you send your spi frames to 
fast or you need to implement an initialization that your lcd can 
identify an open communication.

I had the same problem with my atmega a few days ago...

Author: Vancouver (Guest)
Posted on:

Rate this post
0 useful
not useful
Vijaya,

as Lothar said, it is useless to post simulator screenshots here as you 
simulation is working, but your hardware is not.

Did you check the presence of a clock signal at the output pins?
What kind of clock source are you using in your simulation model and in 
the real hardware?
How do you generate the reset signal, is it from an external pushbutton 
oder generated from an internal counter?

Did you prove there are any signal forms at the FPGA outputs? Did you 
check whether the clock frequency conforms to the LCD's data sheet?

Author: Vijaya Kalluri (vijji148)
Posted on:
Attached files:

Rate this post
0 useful
not useful
Hi,


  I couldn't able to debug my project. The following attached files are 
related to my project. Kindly, help me to point out the error.

 Any help would be appreciated.

Thanks & Regards,
Vijji

Reply

Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]




Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.