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Forum: FPGA, VHDL & Verilog Structural Model for 1-Bit ALU , VDHL code


Author: Anna Noukou (Guest)
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Hello ,
I would appreciate it if somebody could help me with the picture below . 
I was wondering how to create a structural model for this ALU using VHDL 
statement.

Author: Mh. M. (mhm)
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Anna Noukou wrote:
> Hello ,
> I would appreciate it if somebody could help me with the picture below .
> I was wondering how to create a structural model for this ALU using VHDL
> statement.

Have you done any first tests, any tries on your own? I assume this is 
homework, especially your homework. So please try doing it by yourself 
and if you encounter any problems while doing so feel free to ask 
specific questions but always with your own code attached!

Author: Anna Noukou (Guest)
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nai haha

: Restored by Moderator

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