EmbDev.net

Forum: FPGA, VHDL & Verilog Two digit BCD adder


von Yhx Y. (Company: Yhx) (yhx)


Attached files:

Rate this post
useful
not useful
WHY can't operation carry?

von Lothar M. (Company: Titel) (lkmiller) (Moderator)


Rate this post
useful
not useful
Yhx Yhx wrote:
> f.png
Why sourcecode as picture? Do it this way:
1
[vhdl]
2
   your VHDL code
3
[/vhdl]
Where's the code for the full adder? Is it working?
Why do you have a full adder as a component, and why do you also use the 
'+' operator?

> f2.png
What are the signals in there? You should have the signal names in the 
screenshot? Or ist is a riddle for us to assign the signals to the 
values?

: Edited by Moderator
von Yhx Y. (Company: Yhx) (yhx)


Attached files:

Rate this post
useful
not useful
I'm sorry
The "BCD.txt" is my code, and my full adder is work correctly.
What should i revise for this problem?
Thanks a lot.

Please log in before posting. Registration is free and takes only a minute.
Existing account
Do you have a Google/GoogleMail account? No registration required!
Log in with Google account
No account? Register here.