Hi,
I am having trouble finding the reason for a hard fault exception on my
cortex-M3 (STM32F107). I have implemented the exception handler
according to the book "The definiteve guide to the ARM Cortex-M3".
The assembler part:
1 | __asm void HardFault_Handler(void)
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2 | {
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3 | IMPORT hard_fault_handler_c
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4 | TST LR, #4
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5 | ITE EQ
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6 | MRSEQ R0, MSP
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7 | MRSNE R0, PSP
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8 | B hard_fault_handler_c
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9 | }
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And the C part:
1 | void hard_fault_handler_c(unsigned int * hardfault_args)
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2 | {
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3 |
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4 | volatile unsigned int stacked_r0;
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5 | volatile unsigned int stacked_r1;
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6 | volatile unsigned int stacked_r2;
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7 | volatile unsigned int stacked_r3;
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8 | volatile unsigned int stacked_r12;
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9 | volatile unsigned int stacked_lr;
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10 | volatile unsigned int stacked_pc;
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11 | volatile unsigned int stacked_psr;
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12 |
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13 | stacked_r0 = ((unsigned long) hardfault_args[0]);
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14 | stacked_r1 = ((unsigned long) hardfault_args[1]);
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15 | stacked_r2 = ((unsigned long) hardfault_args[2]);
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16 | stacked_r3 = ((unsigned long) hardfault_args[3]);
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17 |
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18 | stacked_r12 = ((unsigned long) hardfault_args[4]);
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19 | stacked_lr = ((unsigned long) hardfault_args[5]);
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20 | stacked_pc = ((unsigned long) hardfault_args[6]);
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21 | stacked_psr = ((unsigned long) hardfault_args[7]);
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22 |
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23 | printf ("[Hard fault handler]\n");
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24 | printf ("R0 = %08x\n", stacked_r0);
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25 | printf ("R1 = %08x\n", stacked_r1);
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26 | printf ("R2 = %08x\n", stacked_r2);
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27 | printf ("R3 = %08x\n", stacked_r3);
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28 | printf ("R12 = %08x\n", stacked_r12);
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29 | printf ("LR = %08x\n", stacked_lr);
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30 | printf ("PC = %08x\n", stacked_pc);
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31 | printf ("PSR = %08x\n", stacked_psr);
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32 | printf ("BFAR = %08x\n", (*((volatile unsigned long *)(0xE000ED38))));
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33 | printf ("CFSR = %08x\n", (*((volatile unsigned long *)(0xE000ED28))));
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34 | printf ("HFSR = %08x\n", (*((volatile unsigned long *)(0xE000ED2C))));
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35 | printf ("DFSR = %08x\n", (*((volatile unsigned long *)(0xE000ED30))));
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36 | printf ("AFSR = %08x\n", (*((volatile unsigned long *)(0xE000ED3C))));
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37 | while (1)
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38 | {}
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39 | }
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When the CPU traps, I get the follwing output:
1 | [Hard fault handler]
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2 | R0 = 00000000
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3 | R1 = 00000000
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4 | R2 = 00000004
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5 | R3 = 00000004
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6 | R12 = 01010101
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7 | LR = 08002987
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8 | PC = 08000768
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9 | PSR = 61000000
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10 | BFAR = e000ed38
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11 | CFSR = 00000400
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12 | HFSR = 40000000
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13 | DFSR = 00000000
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14 | AFSR = 00000000
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From this I can see that in CFSR's BFSR part bit bit 2 (IMPRECISERR) is
set. According to the book this means:
"Bus error during data access. Bus error could be caused by device not
being initialized, access of privileged-only device in user mode, or the
transfer size is incorrect for the specific device."
I was also able to find the source code line that causes the exception:
1 | uint8_t err;
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2 |
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3 | devData[minorNum]->writeMutex = OSMutexCreate(2, &err);
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4 | if (OS_ERR_NONE != err) {
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5 | return DRV_ERR;
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6 | }
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The assebler code for this is:
1 | 124: devData[minorNum]->writeMutex = OSMutexCreate(2, &err);
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2 | 0x0800074C 4669 MOV r1,sp
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3 | 0x0800074E 2002 MOVS r0,#0x02
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4 | 0x08000750 F002F8D5 BL.W OSMutexCreate (0x080028FE)
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5 | 0x08000754 494A LDR r1,[pc,#296] ; @0x08000880
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6 | 0x08000756 F8511024 LDR r1,[r1,r4,LSL #2]
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7 | 0x0800075A 6048 STR r0,[r1,#0x04]
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8 | 125: if (OS_ERR_NONE != err) {
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9 | 0x0800075C F89D0000 LDRB r0,[sp,#0x00]
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10 | 0x08000760 B110 CBZ r0,0x08000768
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11 | 126: return DRV_ERR;
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12 | 127: }
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The exception occurs when executing
or more exactly on instruction
Register sp conatains 0x200010f4 (before executing the LDRB
instruction), which is in the RAM area.
Any ideas on what's going wrong here?
Thanks in advance for your tips and help!
P.S.: I am using the RealView compiler.
--
Regards,
Marco
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